generating 48KHz and 44.1KHz for DIT

Hi,

Are you trying to use AM1808 McASP as a I2S master? In that case 12MHz can not make both 44.1KHz and 48KHz.

Also are you interface to S/PDIF decoder chip or directly connect S/PDIF signal to McASP? AM1808 does not support directly interface to S/PDIF (S/PDIF in).

Or are you using DIT (S/PDIF out)? 

Regards,

Hyun

Hi, as Hyun says, McASP does not support S/PDIF reception (DIR), only S/PDIF transmission (DIT).

You are correct--you cannot divide 12 MHz down to either sample rate.  Additionally, there isn't a crystal that you can put on that will do both.  To support 48kHz and multiples of it, you need a 24.576 MHz or 12.288 MHz crystal.  For 44.1 kHz, you'd use 22.5792 MHz or 11.2896 MHz.  But be aware of what other internal clock frequencies you might need to generate, as for instance these won't divide down to the frequencies that you'll need for USB.

One solution I've seen, if you have a DIR in your system somewhere, is to take that DIR's master clock output and connect it to AHCLKX, and then divide down with McASP to get the needed clocks.  Granted, this only works if you're getting 44.1 kHz and want to send out 44.1 kHz, or getting 48 and sending out 48.  Else your best bet might be to use a programmable clock chip and connect that to AHCLKX.

Hi, looking at a similar setup.

Connecting a 24.576MHz clock to mcasp0_ahclkx and a 22.5792MHz to mcasp0_ahclkr.
Running a PCM1791A as slave @96 or 192kHz, and a PCM1851A slave @44.1kHz

Need some help on deciding what to use to generate those clocks.

Most basic would be to go for 2x oscillators. I've seen Abracon mems types like ASDMB-series in use but also heard someone saying that mems osc's to be avoided for audio clocks.

Option 2 would be to use a programmable clock generator like Silabs Si5351 that could output two clocks to the McAsp (with some flexibility). Though this IC will need a crystal at 25MHz so cost will be higher. (These can accept an external clock to avoid the xtal but reading the AM335x datasheet .. "Using these signals for time-critical external circuits is discouraged because of unpredictable jitter performance." I guess the 24MHz clock out is not suitable.

Also, some schematic and layout best-practices for tying the osc to mcasp&mclk inputs would be greatly appreciated.

best /d

Hello.

So you want to Rx at 44.1k, and Tx at 48k.  You're doing some kind of software sample rate conversion?

Anyway, I don't have any suggestions as to what devices to use to generate those clocks.  I don't know what else you have running in your system, so this might not be feasible--but if you used a 24.576 MHz clock source for the device's main OSCIN/CLKIN etc then you can internally generate your 48 kHz based clocks by using the AUXCLK in McASP--basically you set the AHCLKX source as internal.  Then you only have to worry about externally sourcing the 22.5792 MHz clock.

I'm not familiar with AM335x so I'm not sure what the cautionary statement re: jitter is referring to.

As far as layout/schematic, just try to keep the clock traces as short as you reasonably can, and you probably need to series terminate them near the source.  Usually 22 ohm works OK, assuming you've got a four layer board and characteristic trace impedance of ~75 ohms, and that your clock source has around a 40-50 ohm output buffer.