• State
  • Locked Locked
  • Replies 6 replies
  • Subscribers 99 subscribers
  • Views 778 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Would like to use EMIFA bus on OMAP-L138 to interface to FPGA.

Boris Fennema
Intellectual 510 points
Other Parts Discussed in Thread: OMAP-L138, OMAPL138

For a new product we would like to use the EMIFA interface to share information between an FPGA and the OMAP-L138. Data rates are modest at about  16 Mbps.

Is there a good software example for the edma kernel driver we would have to develop ? We would need to add some additional hand/shaking signals using general I/O pins.

Essentially the EMIFA would read and write internal FPGA fifo's and use DMA to transfer the content to kernel memory.

It is early days, but I am looking for some additional examples on the software side.

Best regards.

Boris.

  • 0
    Expert 1550 points

    Dear Boris ,

    I have just finished exactly the same activity from ARM+LINUX & DSP6748+DSPBIOS LINK. 

    So if you can elaborate i might help u !!!!!!!!!!

    We have build the following where we have processor + XILINX FPGA [S6]:-

    [ARM+LINUX]

    a) EMIF   --> Register Acess read & write

    b) EDMA --> EDMA from master [processor] to FPGA[slave] connected via EMIF

    c) GPIO configured as interrupt  from FPGA

    d) UPP data transmission from master to FPGA [slave]

    [DSP+DSPBIOS LINK]

    Point a) , b) ,urrently working for point d)

    Ashish Mishra

    [Banglore /India]

  • 0 in reply to Ashish Kumar Mishra
    Intellectual 510 points

    Dear Ashish,

    Many thanks for your reply.

    We are thinking of using the Ubuntu Linux environment with a modified Kernel - it would seem that you are using DSPLINK/BIOS.

    I am not  that familiar yet with OMAP but from what I have read, that means you are closer to hardware ? Any reason for not using the Linux ? Or are your processing demands such that you need the better real-time performance.

    On the h/w FPGA side; current thinking is to sample the /WE and /RE strobes on the EMIFA interface (using our local xtl on the FPGA) and store the data

    in a fifo before processing. (We are using an Actel FPGA). We would use the EMIFA in NOR flash like mode.

     

    Best regards,


    Boris

  • 0 in reply to Boris Fennema
    Expert 1550 points

    Hi Boris , 

    1. As informed even i have used UBUNTU [version 10.04] for the work and for our requirement it was suffiecient.

        DSPBIOS is additional stuff our customer has asked hence that work.

    2. "On the h/w FPGA side; current thinking is to sample the /WE and /RE strobes on the EMIFA interface (using our local xtl on the FPGA) and store the data"

         This should be achievable without much trouble . 


    3. I will be in a better position to help if u can let us know:- 

       1) What and HOW exactly u want to use the interface

       2) Any particular feature or performance factor u r looking to achieve ?


    Hope its fine to you .


    Ashish Mishra

    [Banglore / India]        

  • 0 in reply to Ashish Kumar Mishra
    Intellectual 510 points

    Thanks for the reply - regarding the details, we are still finalising the rates etc - it would be moderately slow (4MHz at 16 bit width).

    I will study OMAP some more and post more details in a while if I am still confused.

     

    Best regards

    Boris.

  • 0 in reply to Ashish Kumar Mishra
    Prodigy 110 points

    Hi Ashish Mishra1,

           I want to use EMIF-A interface on the omapl138 to connect the fpga.  the dsp subsystem read or write data in FIFO, then dsp conmunication with arm by  mpcsxfer project (a sample in dsplink  source). Dose this design OK? How to programme or edit in  mpcsxfer project  to make it? 

    Thank you!

  • 0 in reply to xiaohuan lee
    Expert 1550 points

    Hi xiaohuan lee , 

    1. Yes that is straight forward and can be done easily.

         Basically code will do an read /write from FPGA via emif , FIFO logic and its synchronization code has to take care . 

    2. I haven't done DSP to ARM communication  , as my requirement was having EDMA from DSP processor 

       sending and receiving the data from FPGA

        I haven't worked much on DSP-BIOS side , hence can't help for that.

    Hope it helps ....

    Ashish Mishra 

    [Banglore /India]