about cl6x in compiler

Hi Winston,

It should have been -D (explained in the compiler manual) instead of -d.  But it seems current compiler recognizes -d as same as -D.

In short, it simply pre-defines macro named '_TMS320C6X'.

Best Regards,
Atsushi

Hi Atsushi

you mean -d maybe the command of  the old complier for cl6x , in the new compiler ,I should use -D ,just  pre-defines macro named '_TMS320C6X'. 

BRS

winston

Hi Atsush

also here is :

cl6x -g -i"csl_c6488" -d"_TMS320C6X" -mv6400 "hw_init.c"
cl6x -@"hw_init.lkf"

here is the content of "hw_init.lkf"

-z -c -m"./hw_init.map" -o"./hw_init.out" -w -i"C:/CCStudio_v3.3/C6000/csl/lib" -i"C:/CCStudio_v3.3/C6000/xdais/lib" -i"C:/CCStudio_v3.3/bios_5_31_02/packages/ti/bios/lib" -i"C:/CCStudio_v3.3/bios_5_31_02/packages/ti/rtdx/lib/c6000" -i"C:/CCStudio_v3.3/C6000/cgtools/lib"
hw_init.cmd
hw_init.obj

1.    why the file named .lkf ? can this file named hw_init.asm or hw_init.rty ,whatever 

2. why this file comprise hw_init.cmd hw_init.obj ?    can you help me find the author's aim?

ありがとうございます

BRS

Hi Winston,

> you mean -d maybe the command of  the old complier for cl6x , in the new compiler ,I should use -D ,just  pre-defines macro named '_TMS320C6X'.

Yes, I found an old compiler documentation mentioned -d to pre-define the macro.  But I'm afraid that I don't know when it exactly changed...

> 1.    why the file named .lkf ? can this file named hw_init.asm or hw_init.rty ,whatever

Sorry.  I don't know that.  Some colleague may answer...

> 2. why this file comprise hw_init.cmd hw_init.obj ?    can you help me find the author's aim?

To my best knowledge, when launching cl6x, we can provide linker command file (.cmd) and also object files (.obj) which is recognized by linker.  I think the section 5.1.1 Invoking the Linker Separately of SPRU187U (http://www.ti.com/lit/ug/spru187u/spru187u.pdf) mentions it.

どういたしまして! :)

Best Regards,
Atsushi

Hi Atsushi

Thanks for your reply. I have another question to ask you.

as we know , when we do boot image for 6487,

the  Boot Table Structure
The boot table format is as follows:
• A 32-bit header record indicating where the bootloader should branch after it has completed copying
the data
• For each COFF section
– 32-bit Section byte count
– 32-bit Section address (destination address for the copy)
– The data to be copied
• A 32-bit Termination record (0x00000000)

when the 6487 reset ,and jump to cint_00,so , in the our old boot code ,

// structure: size, address, data

#define DDR2_BASE 0x70000000
#define DDR2_SDCFG DDR2_BASE+0x08
#define DDR2_SDRFC DDR2_BASE+0x0C
#define DDR2_SDTIM1 DDR2_BASE+0x10
#define DDR2_SDTIM2 DDR2_BASE+0x14
#define DDR2_DMCCTL DDR2_BASE+0xE4
#define DDR2_IOCTRL DDR2_BASE+0xF0

#define WRITEVAL_01_SDCFG CSL_FMK( DDR2_SDCFG_DDR2_TERM1, 0 ) \
| CSL_FMK( DDR2_SDCFG_BOOT_UNLCK, CSL_DDR2_SDCFG_BOOT_UNLCK_UNLOCKED ) \
| CSL_FMK( DDR2_SDCFG_DDR2_DDQS, 1 ) \
| CSL_FMK( DDR2_SDCFG_DDR2_TERM0, 1 ) \
| CSL_FMK( DDR2_SDCFG_DDR2_EN, 1 ) \
| CSL_FMK( DDR2_SDCFG_DDR2_DIS_DLL, 0 ) \
| CSL_FMK( DDR2_SDCFG_DDR_DRIVE0, CSL_DDR2_SDCFG_DDR_DRIVE0_WEAK ) \
| CSL_FMK( DDR2_SDCFG_DDR_EN, 1 ) \
| CSL_FMK( DDR2_SDCFG_SDRAM_EN, 1 ) \
| CSL_FMK( DDR2_SDCFG_TIMING_UNLCK, CSL_DDR2_SDCFG_TIMING_UNLCK_CLEAR ) \
| CSL_FMK( DDR2_SDCFG_NM, NCDSP_DDR2_NM ) \
| CSL_FMK( DDR2_SDCFG_CL, NCDSP_DDR2_CL ) \
| CSL_FMK( DDR2_SDCFG_IBANK, NCDSP_DDR2_IBANK ) \
| CSL_FMK( DDR2_SDCFG_EBANK, 0 ) \
| CSL_FMK( DDR2_SDCFG_PAGESIZE, NCDSP_DDR2_PAGESIZE )

const Uint32 c_int00[] =
{
4, DDR2_SDCFG, WRITEVAL_01_SDCFG,
4, DDR2_SDCFG, WRITEVAL_02_SDCFG,
4, DDR2_SDTIM1, WRITEVAL_03_SDTIM1,
4, DDR2_SDTIM2, WRITEVAL_04_SDTIM2,
4, DDR2_SDRFC, WRITEVAL_05_SDRFC,
4, DDR2_SDCFG, WRITEVAL_06_SDCFG,
4, DDR2_DMCCTL, WRITEVAL_07_DMCCTL,
4, DDR2_SDCFG, WRITEVAL_08_SDCFG,
4, DDR2_SDCFG, WRITEVAL_09_SDCFG,
4, DDR2_SDCFG, WRITEVAL_10_SDCFG,
4, DDR2_DMCCTL, WRITEVAL_11_DMCCTL,
4, DDR2_DMCCTL, WRITEVAL_12_DMCCTL,
4, DDR2_IOCTRL, WRITEVAL_13_IOCTL
};

here,4 is 32-bit Section byte count .DDR2_SDCFG is 32-bit Section address (destination address for the copy), WRITEVAL_01_SDCFG is  The data to be copied.

my question if I need to do like this when I do 6616 boot image? or  the mergebtbl.exe can do  the date structure conversion . I just need to do the DDR3 configuration.

just as  const Uint32 c_int00[] =
{
WRITEVAL_01_SDCFG,(new DDR3 configuration )
, WRITEVAL_02_SDCFG,
 WRITEVAL_03_SDTIM1,
WRITEVAL_04_SDTIM2,
WRITEVAL_05_SDRFC,
 WRITEVAL_06_SDCFG,
 WRITEVAL_07_DMCCTL,
WRITEVAL_08_SDCFG,
 WRITEVAL_09_SDCFG,
WRITEVAL_10_SDCFG,
WRITEVAL_12_DMCCTL,
WRITEVAL_13_IOCTL
};

Hi Winston,

May I ask which document do you refer and what boot mode do you prefer?

Best Regards,
Atsushi

HI  Atsushi

TMS320TCI648x DSP Bootloader User's Guide.pdf    Please look for Page48

  6076.EMAC_boot_notes_ALU.doc

Please see the attchments

Best Regards

Winston

HI  Atsushi 

I want to choose EMAC boot mode.

Best Regards

Winston

Winston,

I'm now trying to find the author of the document.  Meanwhile, could you also refer KeyStone Architecture Bootloader User Guide (http://www.ti.com/lit/ug/sprugy5b/sprugy5b.pdf)?

Regards,
Atsushi

HI  Atsushi

I am reading the Keystone bootloader User Guide,. and try to make the EMAC boot image .

I will updata with you :)

Brs

Winston

Hi Winston,

   I wrote the 6076.EMAC_boot_notes_ALU.doc when I learned about EMAC boot. It is a learning note. Actually, I have little experience on boot loader.

By my understanding, the boot loader receives the boot packet and constructs them into the boot table. The boot table has many sections. Each section specifies the byte count, section address to be copy and section data. In the code you listed, it seems that you treat the DDR configurations as some sections, so that the boot loader will copy theses DDR configuration words to the corresponding DDR control registers. I think this method is common for both 64xx and 66xx. But I do not know details on this. Sorry!

const Uint32 c_int00[] =

{

4, DDR2_SDCFG, WRITEVAL_01_SDCFG,

4, DDR2_SDCFG, WRITEVAL_02_SDCFG,

4, DDR2_SDTIM1, WRITEVAL_03_SDTIM1,

4, DDR2_SDTIM2, WRITEVAL_04_SDTIM2,

4, DDR2_SDRFC, WRITEVAL_05_SDRFC,

4, DDR2_SDCFG, WRITEVAL_06_SDCFG,

4, DDR2_DMCCTL, WRITEVAL_07_DMCCTL,

4, DDR2_SDCFG, WRITEVAL_08_SDCFG,

4, DDR2_SDCFG, WRITEVAL_09_SDCFG,

4, DDR2_SDCFG, WRITEVAL_10_SDCFG,

4, DDR2_DMCCTL, WRITEVAL_11_DMCCTL,

4, DDR2_DMCCTL, WRITEVAL_12_DMCCTL,

4, DDR2_IOCTRL, WRITEVAL_13_IOCTL

};  

Regards

James

Hi James

Thanks for your reply:)

about the EMAC_boot_notes_ALU.doc

core0.out

-a  // Output ASCII hex format

-boot  // Select boot mode

-e _c_int00  // 指定entry point

-order L  // 指定data ordering是小端

ROMS

{

   ROM1:  org = 0x0400, length = 0x10000, memwidth = 32, romwidth = 32

          files = { core0.btbl } // Specify output file names

}    

My question is what is the actually meaning of ROM1? Why the ROM origine from 0x400?  It seems it has no relationship from the Boot ROM of 64x DSP?

I think the org in ROMS directive is useless (you can try to modify it to other values). The actual load address of each section(such as .text, .cinit and .const) is converted from the out file by Hex6x. Please refer to spru186V section 11.4 for the description of ROMS directive.

Hi James

Could you share the demo boot  project  which refered by  the EMAC_boot_notes_ALU.doc ?

I want to know ,if  there is not  main fuction ,  I can not compile the .out file , should the boot project be wrote by assemble language?

it is better send to my email :xuechennjut@163.com

Brs

Winston

Hi James

Thanks very much for your reply:)

as I know, one projet can only create one .out file ,but  the project  can create two out file core0.out and emac_boot_mc.out .

1.my question is how can you create two out files? what is the relationship between them?

2.as I know, in 64x ,the boot project which used by create boot image  does not need to include the main fuction,but  in the 66x,the boot project need to include the main fuction ,if I do not include the main fuction ,the compiler will show compile  errors? Can you explain   this?

3.about the c_int00 entry, should I write the c_int00 entry fuction use C language or assembler language?

4.as the boot document refered , we need to merge(combine)  from the core0.btbl to core7.btbl to one simple btbl file, my question is if I just want to boot the 66x DSP from core0 ,should I do like this?

Brs

Winston

Winston,

This appears to be a new distinct question.  If so, please post it in a new thread rather than chaining new questions on top of old ones.  In that way, the most apporpriate person can answer the question, plus it will be easier for people with the same issue to search and find it.

Thanks,

Dave

Hi Dave

I solved these problems  throught out testing my EVM board.

Thanks very much:)

Brs

Chenguang