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Generating test pattern

ranchu
Guru 20755 points


Hi,

Using RDK, I would like to ask if there is simple method to generate test pattern, or there need to build specific usecase for that.

Regards,

Ran

  • 0
    TI__Guru 59700 points

    By test pattern do you mean somthing like generating color bar on the display.Can you provide more details.

  • 0 in reply to Badri Narayanan
    Guru 20755 points

    yes exactly, I mean generating bar color in display. This is for purpose of debug: our engineers think that for proper checking the DM8168 - FPGA interface for output we actually must generate test pattern in DVOs output and check in FPGA the incoming frames. A similar check is also required in input ports: FPGA will generate color bar frames and DM8168 will need to detect the incoming frames. If you believe such testings are not required please tell me. It might makes things more simpler, but anyway as I said this is for debug, and we can seperate the debug and the operational capabilities.

    Thank you very much,

    Ran

  • 0 in reply to ranchu
    TI__Guru 59700 points

    Color bar generation is supported for all the display VENCS. You will only have to program a regiser.On the capture size I dont think there is any test pattern mode. If FPGA generates test pattern it will be captured like a normal video frame.

  • 0 in reply to Badri Narayanan
    Guru 20755 points

    Hi, Is there any support for color bar/generate test pattern in display using RDK framework or should we explicitly use the register ?
    Regarding capture detection: Is there a way to know that video is detected in capture module ? I found no API for that.

    Best Regards, Ran

     

  • 0 in reply to ranchu
    TI__Guru 59700 points

    Color bar generation is supported in the uboot (colorbar cmd) .

     

    From user space you can use the ./bin/mem_rdwr.out to set and get register values.

    For example:

     

    To Enable color bar on HD_VENC_D_VOUT1

    ./bin/mem_rdwr.out --rd 0x48106000

    0x48106000: 44023013

    ./bin/mem_rdwr.out --wr 48106000 0x4402b013

     

    Below is the register to set color bar for the various VENCs:

    HDVPSS Base : 0x4810_0000

    SD_VENC VMOD
    0x5E04
    Bit 4 cbar
    Color-bar mode
    0: Normal output
    1: Color-bar output
    RW 0x0


    HD_VENC_D_VOUT1
    Address Offset 0x6000
    Bit 15 stest
    Self test mode
    1: The HD encoder will enter self-test mode. The encoder
    will
    generate a 100% color bar internally; video data from OSD
    will
    be ignored.
    0: The HD encoder will be in normal operation mode.
    Default: 0

    HD_VENC_A
    Address Offset 0x8000
    Bit 15 stest
    Self test mode
    1: The HD encoder will enter self-test mode. The encoder
    will
    generate a 100% color bar internally; video data from OSD
    will
    be ignored.
    0: The HD encoder will be in normal operation mode.
    Default: 0

    HD_VENC_D_VOUT0
    Address Offset 0xA000
    Bit 15 stest
    Self test mode
    1: The HD encoder will enter self-test mode. The encoder
    will
    generate a 100% color bar internally; video data from OSD
    will
    be ignored.
    0: The HD encoder will be in normal operation mode.
    Default: 0


     For capture you can use the capture driver advanced statistics (printed as part of Vsys_printDetailedStatistics()) to check the number of frames captured. There is no API to know if Video is detected at VIP or not.It is better to detect input connection status from the external video decoder. HDVPSS has a VDET (Video Detected Status bit) which reiles on metadata in line multiplexed mode and will not work in all modes.Reading VDET status bit is not exposed at RDK API level though

  • 0 in reply to Badri Narayanan
    Guru 20755 points

    Should it be assumed that the parameters for the color bar are already entered in other registers, or is it something that is determined in other way ? Is using nullsrc Link a better way to inject color bar ?

    Regarding the  Vsys_printDetailedStatistics, we noticed that number of frames counter is incremented even without any video.

    Regards, Ran

     

  • 0 in reply to ranchu
    TI__Guru**** 479825 points

    Hi,

     

    It outputs color bar for the mode that is set in its config registers, so it does require other registers to be set.

     

    Regards,

    Brijesh Jadav