Just noticed that by letting MPU watchdog reset happen to generate a global warm reset, the data pins (dat7 e.g.) was driven to high (1.8v) slowly.
Anybody has an idea?
Thanks,
Philip
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Just noticed that by letting MPU watchdog reset happen to generate a global warm reset, the data pins (dat7 e.g.) was driven to high (1.8v) slowly.
Anybody has an idea?
Thanks,
Philip
Thanks for your reply.
We don't have an external pullups on MMC1 lines, and we have a 1.8v input to vdds_mmc1 from the PMIC and a 3.3v directly from the power supply.
If it does a cold boot, the mmc1_dat7 pin goes to high then immediately will be pulled down to ZERO, but with a watchdog timeout warm reset, the mmc1_dat7 high as 1.8v lasted for around 10 seconds.
Before the watchdog reset, mmc1_dat7 is configured as a GPIO_129 and set to low.
Thanks,
Philip
Philip
Hi Biser:
We have 1.8v connected to vdd_mmc1, and 3.3v connected to vdd_mmc1a (vdd_sim). And the MMC1_DAT7 is powered by vdd_mmc1a.
Thanks,
Philip