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OMAPL-137 USB Interrupt Handling

Other Parts Discussed in Thread: OMAP-L137

Hello,

I am using the OMAP-L137 and development environment is CCSv5.2.

I referred to SPRUFM9H.pdf document and created the following programs.

*************************************************************************************************************************************

/*
 * Initializing the USB2.0 Controller
 *      SPRUFM9H.pdf : Reference Section 3.1
 */
void usb_init()
{
      :
      :

    // Enable interrupts in OTG block
    usbRegs->CTRLR &= ~CSL_USB_OTG_CTRLR_UINT_MASK;

    // Enable All Core Tx Endpoints Interrupts + EP0 Tx/Rx interrupt
    usbRegs->INTRTXE = (
      CSL_USB_OTG_INTRTXE_EP4TX_MASK
      | CSL_USB_OTG_INTRTXE_EP3TX_MASK
      | CSL_USB_OTG_INTRTXE_EP2TX_MASK
      | CSL_USB_OTG_INTRTXE_EP1TX_MASK
      | CSL_USB_OTG_INTRTXE_EP0_MASK);

    // Enable All Core Rx Endpoints Interrupts
    usbRegs->INTRRXE = (
      CSL_USB_OTG_INTRRXE_EP4RX_MASK
      | CSL_USB_OTG_INTRRXE_EP3RX_MASK
      | CSL_USB_OTG_INTRRXE_EP2RX_MASK
      | CSL_USB_OTG_INTRRXE_EP1RX_MASK);

    // Enable all interrupts in OTG block
    usbRegs->INTMSKSETR = 0x01FF1E1F;

   // Enable all USB interrupts in MUSBMHDRC
    usbRegs->INTRUSBE = 0xFF;

      :
      :
}

/*
 * USB Interrupt Handler
 */
interrupt void handle_isr()
{
    Uint32 intsrcr;

    intsrcr = usbRegs->INTSRCR;

      :
      :
}

/*
 * Main Method
 */
void main(void)
{
    _enable_interrupts();

    usb_init();

    while (1)
    {
        // main loop(wait interrupt)
    }
}

*************************************************************************************************************************************

However,  handle_isr function is not called although the program was run.

Is there any mistake in handling of an interrupt function?

Regards

  • Hello,

    Since it is first to use a board and CCS as for me, I may not be a suitable question. 

    I considered the reason which an interrupt does not generate.

        1. Does the switch of some of OMAP-L137 boards need to be set up?

        2. Does a setup required for interruption except a source code exist?

    Regards

  • Check whether USB PLL clocks and PHY are configured properly.

    Regards

    Ravi B

  • Thanks, Ravi B.

    In the initial function which I created, it has set up as follows.

    ********************************************************************************
        // RESET: Hold PHY in Reset
        BootCfg->CFGCHIP2 |= CSL_SYSCFG_CFGCHIP2_RESET_MASK;    // Hold PHY in Reset
        // Drive Reset for few clock cycles
        for (ic=0; ic<50; ic++);
        // RESET: Release PHY from Reset
        BootCfg->CFGCHIP2 &= ~CSL_SYSCFG_CFGCHIP2_RESET_MASK;   // Release PHY from Reset
      /* Configure PHY with the Desired Operation */
        // OTGMODE
        BootCfg->CFGCHIP2 &= ~CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_MASK;
        BootCfg->CFGCHIP2 |= (CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_USB_DEVICE << CSL_SYSCFG_CFGCHIP2_USB0OTGMODE_SHIFT);
        // PHYPWDN
        BootCfg->CFGCHIP2 &= ~CSL_SYSCFG_CFGCHIP2_USB0PHYPWDN_MASK;
        // OTGPWRDN
        BootCfg->CFGCHIP2 &= ~CSL_SYSCFG_CFGCHIP2_USB0OTGPWRDN_MASK;
        // DATAPOL
        BootCfg->CFGCHIP2 |= CSL_SYSCFG_CFGCHIP2_USB0DATPOL_MASK;
        // SESNDEN
        BootCfg->CFGCHIP2 |= CSL_SYSCFG_CFGCHIP2_USB0SESNDEN_MASK;
        // VBDTCTEN
        BootCfg->CFGCHIP2 |= CSL_SYSCFG_CFGCHIP2_USB0VBDTCTEN_MASK;

        BootCfg->CFGCHIP2 |= 0x2u;    // 24MHz
        // USB2PHYCLKMUX
        BootCfg->CFGCHIP2 |= CSL_SYSCFG_CFGCHIP2_USB0PHYCLKMUX_MASK;
        // PHY_PLLON: On Simulation PHY PLL is OFF
        BootCfg->CFGCHIP2 |= CSL_SYSCFG_CFGCHIP2_USB0PHY_PLLON_MASK;
     /* Wait Until PHY Clock is Good */
        while ((BootCfg->CFGCHIP2 & CSL_SYSCFG_CFGCHIP2_USB0PHYCLKGD_MASK) == 0);
    ********************************************************************************

    I suspect that the Interrupt Function has not attached the relation to the Interrupt Event(USB0_INT).

    I want to know, the attachment method of the Interrupt Function.

    Best Regards


  • Hi

    I am not sure about interrupt handler attachment in CCS. But make sure the interrupts are enabled by writing into appropriate USBSS INTR SET register, and also you may have to enble the interrupt at mentor register also.

    Regards

    Ravi B