Any patch for using DMA for nand read on u-boot

Hello,

Have you searched already http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary ?

BR

Vladimir

Hi Vladimir,

Thanks a lot for the help. I do find useful information on http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/169220.aspx. But when using the patch, my u-boot is hanging on reading from FIFO buffer. Can you give me formula for calculating FIFO address? in my setup, value of GPMC_CONFIG7_0 is 0x0048, which means MASKADDRESS is 00 (256MB), BASEADDR is 0x08000000.

Regards,

Yong

I finally get pre-fetch engine working by changing BASEADDR to 0x10000000. The original value 0x08000000 will be masked (256MB 0xF0000000) to 0x00000000.

Now I am trying to use EDMA to get NAND data from FIFO, but I got another problem. It hangs when read EDAM PID register from 0x49000000 (EDMA CC register base address), any hit why?

Regards,

Yong Zou

Hello Yong Zou,

Can you please enter you u-boot prompt and type:

md 0x49000000 0x1

Does it hang now?

BR

Vladimir

Hi Vladimir,

I found the cause. u-boot doesn't enable TPCC, TPTC0, TPTC1, TPTC2 clock. Once I wake up them by writing 0x2 to CM_ALWON_TPCC_CLKCTRL, CM_ALWON_TPTC0_CLKCTRL,  CM_ALWON_TPTC1_CLKCTRL, CM_ALWON_TPTC2_CLKCTRL , the hanging issue is gone.

However, I got another problem after fixing hanging issue. Seems TPTC2 has difficulty to read data from GPMC FIFO buffer. Following are register values when EDMA TPTC2 reading:

TPTC2-STAT(0x49a00240)=0x100 TPTC2-SOPT(0x49a00240)=0x201 TPTC2-SRC(0x49a00244)=0x10000000
TPTC2-ERRDET(0x49a0012c)=0x4 ERRSTAT(0x49a00120)=0x1

Would you tell me meaning of error code 0x4 in TPTC2-ERRDET? Any clue why and how to fix it?

Regards,

Yong Zou

Yong,

A related question? Why are you trying to enable DMA in NAND driver in u-boot? Is this only for performance improvement? If so, what is the current performance that you are getting and what is the expected numbers?

Hi Renjith,

As you guess, it is for performance improvement only. Currently u-boot takes about 5-6 seconds for UBI scan on the nand, I want to reduce the time.

Regards,

Yong

Yong,

What is the current NAND throughput that you are getting? What is the expected throughput finally? You can optimize the code without using DMA as well. 

Hi Renjith,

Current NAND read throughput is 2.2MB/s by using pre-fetch engine. I am not sure what is my expected throughput. I expect using DMA should be better. Please let me know if any other way to improve performance.

Regards,

Yong

Yong, 

Its possible to achieve better throughput of the range of 10-12MB/sec without using DMA. I don't have a ready made patch for this, but we have achieved similar results for our customer's before.