Our design uses an AM3871 with only port 2 of the CPSW being used. Port 1 is not routed, pin functions are used for other things. I have set the pinmux registers to reflect this. In the devices.c (arch/arm/mach-omap2/devices.c) file, where the CPSW is initialized I changed the structures to the following:
#ifdef CONFIG_ARCH_TI814X
#define TI814X_CPSW_BASE (0x4A100000)
#define TI814X_CPSW_MDIO_BASE (0x4A100800)
#define TI814X_CPSW_SS_BASE (0x4A100900)
#define TI814X_EMAC_MDIO_FREQ (1000000)
/* Port Vlan IDs for Dual Mac Mode */
#define CPSW_PORT_VLAN_SLAVE_0 2
#define CPSW_PORT_VLAN_SLAVE_1 3
static u64 cpsw_dma_mask = DMA_BIT_MASK(32);
struct cpsw_slave_data cpsw_slaves[] = {
#if 0
{
.slave_reg_ofs = 0x50,
.sliver_reg_ofs = 0x700,
.dual_emac_reserved_vlan = CPSW_PORT_VLAN_SLAVE_0,
},
#endif
{
.slave_reg_ofs = 0x90,
.sliver_reg_ofs = 0x740,
.dual_emac_reserved_vlan = CPSW_PORT_VLAN_SLAVE_1,
},
};
static struct cpsw_platform_data ti814x_cpsw_pdata = {
.ss_reg_ofs = 0x900,
.channels = 8,
.cpdma_reg_ofs = 0x100,
.slaves = 1,
.slave_data = cpsw_slaves,
.ale_reg_ofs = 0x600,
.ale_entries = 1024,
.host_port_reg_ofs = 0x28,
.hw_stats_reg_ofs = 0x400,
.cpts_reg_ofs = 0x500,
.bd_ram_ofs = 0x2000,
.bd_ram_size = SZ_8K,
.rx_descs = 64,
.mac_control = BIT(5), /* MIIEN */
.gigabit_en = 1,
.host_port_num = 0,
.no_bd_ram = false,
};
Is there anywhere else I would need to modify the sources? Strangely, the kernel still calls it "eth1" instead of "eth0" as I expected.
