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mps field about hyperlink interrput

kabalagala
Intellectual 300 points

Hi!

i feel a little confused when reading  Hyperlink user guide, 2.8,

" If the int2cfg for the remote device is set to  0x0, HyperLink sets the chip-level interrupt control register. The chip-level interrupt control register address is based on the MPS field carried in the interrupt packet. And the vector field determines which bit of the chip-level interrupt control register is set"

My question is whether mps is to select which core to sevice the hyperlink interrupt ?

Now i need to interrupt a specified core in remote DSP as a notice after data transfer,  so i want to know

if i can interrupt the paticular core i want properly with a corresponding value filled in the mps field.

 

Thanks!!!

wish for your reply, Thanks!

  • 0
    Intellectual 300 points

    suppose  i have configured both send and receive sides properly , including ---send side: intlocal = 0,  receive side: int2cfg = 0.

    so i can send a interrupt packet to receive side , and with  int2cfg = 0  in receive side i rout this interrupt to write chip-level interrupt registers base on mps field, but what confuses me is how  mps  determine the chip-level interrupt register i write. in another word how can i know which chip-level interrupt register  i write ? cic0 channel map register? host interrupt enable register? event set  register?