• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 257 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ethernet reset line in omap 3530 som rev E

Sreelakshmi Radhakrishnan
Intellectual 315 points

Hi

We are developing a custom board using omap 3530 based on Mistral  Evaluation Module Reference design.

The reset line of LAN Controller is connected to Sys_boot5/gpio_7 pin.The Sys_boot5/gpio_7 line is pulled low in hardware for flash boot  initially at power on reset and hence the LAN Controller is under reset initially.

But in the sample code from ti, the smsc id (rev id) of the controller is read via GPMC  interface  first and then only the gpio_7 is configured as o/p and driven high.

Which means the id is read when the controller is under reset.ideally the gpio must be driven high to bring the controller out of reset and then only the id should be read.

So is this a bug in the code or am i missing something?pls help..