AM3730 SDRC controller calibration

Diego Alegre

Dear Sr,

I am designing a pcb with a lpddr connected to the sdrc controller of AM3730. The issue is The layout introduces a delay between data bus and strobes lines of 500ps (more or less). I would like to know if the memory controller performs a calibration in order to correct these kind of things before working.

Best Regards.

Diego Alegre

over 12 years ago

0 Diego Alegre over 12 years ago

Prodigy 60 points

Hi again,

Besides the previous question, I would like to know if the lpddr controller timming model included in hyperlynx in valid for the AM3730 or not. If not, might you let me know where could I find it, please?

BR.

Diego A.

0 Biser Gatchev-XID over 12 years ago

TI__Guru**** 393215 points

Hi Diego,

As long as the mismatch is less than 100mils you don't have to worry. See Table 6-21 in the AM37X Datasheet. As for controller initialization, check this link: http://processors.wiki.ti.com/index.php/Setting_up_AM37x_SDRC_registers

0 Diego Alegre over 12 years ago in reply to Biser Gatchev-XID

Prodigy 60 points

Thanks Biser,

could you answer to the second post, please?

Regards.

Diego

0 Biser Gatchev-XID over 12 years ago in reply to Diego Alegre

TI__Guru**** 393215 points

No, I don't have any information on that. Sorry.

0 Diego Alegre over 12 years ago in reply to Biser Gatchev-XID

Prodigy 60 points

All right,

Could anyone answer to the timming model issue, please?

BR.

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AM3730 SDRC controller calibration