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Could GPIO status be hold on between warm reset pin assertion and de-assertion?

Kun Zhang
Prodigy 165 points
Other Parts Discussed in Thread: AM3354

I am working on AM3354, I write a program which shall set a GPIO as an output and be pulled up.

I found something interesting, if I press the reset button without release, which means the reset pin is asserted. After that, I think the CPU stopped and much status of many modules/devices shall be hold on. But the GPIO status lost, I watch the GPIO set with output and pulled up, its voltage becomes low, equal GND.

There is no more information in the user manual to describe this event, I cannot find anything helpful about it. Anyone can explain it?

Thanks!!!

  • 0
    TI__Guru 62945 points

    AM335x returns to its original default state when reset is applied.  Internal logic functions are reset asynchronously when PRWONRSTn is driven low and the internal reset is released synchronously after PRWONRSTn is driven high.  For more details you can refer to the Reset Management section in the TRM.

    The reset state of each terminal is defined in the Ball Characteristics table found in the AM335x Data Sheet.

    Regards,
    Paul