c6748 UART and SPI using EDMA simultaneously

Si Cheng,

Probably, your EDMA ISR is not working correctly. Please see the EdmaIntDispatcher.cpp/.h files in the C6455_Edma.zip project attached to the thread here.

For your case, use the EDMADISPATCH_METHOD = EDMADISPATCH_IEVAL method.

Regards,
RandyP

RandyP.

First I should  tell you  that when I just use UART sending data OR just SPI by EDMA ,it is OK.

I do your advice, and I does not work  as before, I find that  the QSTAT0 's WM  bit field is 0x10, whether it  means too many events in the evnet QUEUE, and Overflow??

if it is ,what should I do?

Regards,
Si Cheng

I am sorry I made a  mistake，the QSTAT WM is  2，not 16!

Si Cheng,

What bit rate and data word size are you using on the two peripherals?

The EDMA3 User Guide explains the causes for EMR being set, which can happen at the same time as SER. Generally, it would take two different events to also leave IPR being set.

Are you now using my EdmaIntDispatcher, and using the EdmaEventHook routine for the two different Edma Service Routines? Those two service routines routines should not be clearing IPR, by the way; that should only be done in the EdmaIntDispatcher function which is the actual ISR.

Regards,
RandyP

Regards,

Maybe I dont't make you know well my code, So I put my  project upload to the forum,And I hope you can run the project to know it well, and I really hope you can help me find where my error is!

My project run in c6748 EVM ,named Zoom OMAP_L138 EVM , and it has a OMAP_L138 chip and a c6748 chip, I use the c6748 chip. 

Regards,
Si Cheng

Si Cheng,

You have done a lot of work on this project. The difficulties you have may be related to the questions I have asked, so your answers will help guide the solution.

What are your data rates? What is your DSP clock speed?

Using the example project that I referenced above, please use that method for handling your EDMA3 interrupt events. This function has gone through a lot of debug work over many years and has been revised to solve very subtle problems that can occur within complex systems. Use the EdmaIntDispatcher(), EdmaEventHook(), and use the CSL example methods shown in the main() function. It is much easier to use working example code than to debug someone else's original code.

Why do you disable interrupts for your UART and SPI in the EDMA ISR? When do you re-enable them?

Regards,
RandyP

Regards,

1 The UART Baud rate is 11520， and the SPI output clock speed is 10MHz, DSP clock speed is 300Mhz.

2 when the uart EDMA over, the UART is not transferring data ,so  I disable the uart , every time I use the UART send data , I will enbale the UART to generate DMA event in the

function  Uart_EdmaSend(); it is the same with SPI , it enbale the spi to generate DMA event in the funtion FlashSectorErase(), FlashPageProgram(), and ReadFromFlash().

Regards,

RandyP,

The EDMA interrupt function have a delay for 50 times, today I modify it to 500 times , then the UART and SPI can run correctly. So I have some questions below:

1 from 50 times to 500 times, what does  it change to lead to the project work well ?

2 I just use EDMA to read or write SPI  flash, no UART operation, I find that if I don't delay for 50 times in The EDMA interrupt function, the spi EDMA read or write will not work well

   a few times later. So it is why The EDMA interrupt function have a delay. But  I am not clear about  the delay's function. Do you know why??

3 I have read the ti's spi read or write operation with EDMA  demo, find that when write to the SPI flash, the demo not only configure the EDMA transfer channel , but also

configure the  EDMA receive channel,  it just write data to the SPI flash, don't receive the SPI flash  data, Why it configures  the receive channel.??  Not just write operation, read

or erase operation all configure both transfer channel and receive channel.  And  I find  if I want to read 256 bytes from the flash, I need send 256 bytes to the spi flash

except the read instruction . I really don't know why. 

I hope you can help me! Thanks!

Regards,
Si Cheng

Si Cheng,

A delay in the ISR is never a good optimization of the process. HWI delays are inherently failures in the interrupts logic since other operations are always held off during this time.

The delay may be passing by the next Ready condition on the SPI peripheral, and that should be handled differently, such as allowing the EDMA to handle that next event.

If read events are being generated, then those must be serviced or there will be problems either in the SPI peripheral or in the EDMA module. It is not possible to know this from outside of your specific application. That logic, of when the SPI should be disabled or enabled, is critical to your design of your system and must be figured out in a way that improves the performance that you are experiencing.

If you need someone to debug your code, I will stay silent and let someone who can do that take the lead here. In my opinion, you need to use the dispatcher that I have provided so that we can eliminate those issues from the set of problems you may have.

Otherwise, you will want to look at the specific timing of the peripherals and the data events for both Rx and Tx, then determine why the delays are necessary and find a way to prevent those.

Regards,
RandyP

RandyP，

I do not know why the edma spi  transfer and receive channel are configured when just write to the spi flash!

Regards

Hi Everybody,

I am facing exactly similar issue on omapl138evm. Here is the link to my post:

http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/325385.aspx

If you have any updates on the resolution of this issue, please tell me. Thank You.

Regards,

Mughees Chohan

Mughees Chohan's question is now marked answered at the link provided above.

Si Cheng's question is left unresolved as of now. If any update is available, please post it.

Regards,
RandyP