DM814x Eval Board CPSW phy_id values in U-Boot evm.c file

Eric

Can you provide the following details

• PSP release you are trying to port
• Which CPSW slave is probed out in your hardware design and its phy_id?
• What phy mode (MII/GMII/RGMII/RMII) are you using?

Did you following the below wiki?
http://processors.wiki.ti.com/index.php/TI81xx_PSP_Porting_Guide#Ethernet_Driver_-_Adding_Custom_Ethernet_Phy

Regards
Mugunthan V N

Hi Mugunthan,

Thank you for the info.  Here are the answers to your questions:

• PSP release you are trying to port

• 5.05.01.04

• Which CPSW slave is probed out in your hardware design and its phy_id?

• Both slave ports, phy_id 1 and 3 respectively.  We are using the TI DP83848k PHY on both ports and I'm enabling Dual Mac Support in the kernel.

• What phy mode (MII/GMII/RGMII/RMII) are you using?

• MII

The link you sent is useful.  I'm still getting familiar with the Linux phy driver and cpsw code.  My question at the moment is specific to U-boot and why the cpsw_slaves phy_id assignment looks backwards, especially when compared to the cpsw_slaves assignment in Linux in the devices.c file.  The Linux file seems correct to me.  Here's what I see in devices.c which you can tell is reverse from what I previously posted from the U-boot evm.c

struct cpsw_slave_data cpsw_slaves[] = {
    {
        .slave_reg_ofs  = 0x50,
        .sliver_reg_ofs = 0x700,
        .phy_id        = "0:00",
        .dual_emac_reserved_vlan = CPSW_PORT_VLAN_SLAVE_0,
    },
    {
        .slave_reg_ofs  = 0x90,
        .sliver_reg_ofs = 0x740,
        .phy_id        = "0:01",
        .dual_emac_reserved_vlan = CPSW_PORT_VLAN_SLAVE_1,
    },
};

Thanks,

Eric

Eric

In U-Boot following are the changes to be made.

• Slave phy id is proper in CPSW slave structure as we use only slave 0 in U-Boot.
• Did you set proper values in GMII_SEL register to configure to MII phy.
• Did you configured pin-mux properly for MII interface.

In kernel you need to change the phy id propery like "0:01" and "0:03" to respective slaves.

Regards
Mugunthan V N

Hi Mugunthan,

Thanks for your help.  I've done the GMII_SEL and pin-muxing.  However, I'm still confused about the phy_id.  The phy_id is the phy address on the MDIO bus, correct?  How come in U-boot phy_id 1 goes with register offset 50 (for port 1) but in Linux phy_id 0 goes with register offset 50?  Why are these values not consistent between U-boot and Linux kernel?  I think one of them must be incorrect unless there's something I'm missing here.

Thanks,

Eric

I figured this out.  U-boot dynamically determines the phy_id for the slaves based on the cpu rev.  In the case of my eval board, it is over-writing the original phy_id values with the correct values.  Here's the code that does that from evm.c:

if (PG1_0 != get_cpu_rev()) {
        cpsw_slaves[0].phy_id = 0;
        cpsw_slaves[1].phy_id = 1;
    }

Wish I had noticed this code earlier.  It would have saved me some time.  U-boot apparently handles various revisions of the cpu or board but I'm not sure the kernel has the same logic. 

Regards,

Eric

Eric

Kernel also has the same kind of cpu rev checks in arch/arm/mach-omap2/devices.c file. Just make sure that platform driver register is passed with proper phy_id to kernel driver.

Regards
Mugunthan V N