I'm reading
"KeyStone Architecture
Literature Number: SPRUGW1B
November 2012
Serial Rapid IO (SRIO)"
There is something i don't understand about the registers of that subsistem
In LSU_REG4 the field SrcID_MAP Defines which sourceID register use for the transaction and the document says that DeviceID Register 1 through DeviceID Register 15 inherit their values from the Base Routing Registers (TLM port n BRR pattern & match registers)
I don't understand how TLM Port(n) Base Routing Register 0 Pattern & Match Register (TLM_SP(n)_BRR_0_PATTERN_MATCH) are matched to the deviceid registers
is:
TLM_SP0_BRR_0_PATTERN_MATCH = RIO_DEVICEID_REG0 register
TLM_SP0_BRR_1_PATTERN_MATCH = RIO_DEVICEID_REG1 register
TLM_SP0_BRR_2_PATTERN_MATCH = RIO_DEVICEID_REG2 register
TLM_SP0_BRR_3_PATTERN_MATCH = RIO_DEVICEID_REG3 register
TLM_SP1_BRR_0_PATTERN_MATCH = RIO_DEVICEID_REG4 register
... and so on or it's different?
And are these registers used both for tx and rx operations?
And how it's used The base device ID CSR (BASE_ID) register? It's used in tx/rx or it's bypassed by the TLM Port(n) Base Routing Register Pattern & Match Registers?
Thanks
Gabriele