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CPRI Synchronization Problem.



Hi Ti Folks,

Fiber connection as shown in the figure above, the DSP and RFx2 CPRI interface.

A and B differ in the length of the cable.

Delay by calculating how long side and make it equal to the short side?

Is it possible to adjust the DSP?Delay measurements, if possible, and reflect how what should I do?

Thanks,

gyosun

  • How long the cable A and B? if it is not very long (like 15 Km), you don't need to care about difference of the delay. it is really minor.

    you can check the whole external delay by checking Delta and Captured Pi of DSP. if Delta is 300 and captured Pi is 350, the total delay created by RH is 50 clock. most delay comes from the RH device loopback operation and not from the fiber cable itself.

    Albert 

  • Hi Albert,

    if so..

    CPRI: 245.76MHz

    pi_capt      = *((Uint32 *)(0x1f48108)) & 0x003FFFFF;
    delta_offset = *((Uint32 *)(0x1f48540)) & 0x003FFFFF;
    diff = pi_capt - delta_offset;

    T14 = 4.06ns * diff

    This calculation will happen?

    And the delay between the DSP and DSP 16 ~ 17clock get a constant very large delay(ms units) between the DSP and FPGA occur.

    Then Toffset is? This often somewhat larger due to the link broken?

    Send this delay to delay the DSP side?

    Thank you

    gyosun.

  • Yes, correct. T14 means the whole delay from DSP egress data start time till the arriving of Ingress Data to the DSP.

    Albert 

  • Thank you.. Albert.

    1. Doing more once the boundary Delay protracted reason 0 hyperframe between REC and RE?
    Cable Delay I trying to calculate. How can set hyperframe offset?

    2. How to use the port EXT_FRAME_EVENT?

    3. Between DSP and FPGA DSP is a link between stable why unstable? FPGA is stable between.

    Thank you for your kindly reply.

    gyosun