Accessing CM_SLEEPDEP_PER register

1258021

Other Parts Discussed in Thread: DM3730

Hi,

We are using DM3730 Processor.

As part of power management implementation we are trying to clear the Sleep Dependency in CM_SLEEPDEP_PER register by clearing it.

Before writing CM_SLEEPDEP_PER register with a value of 0, if we print the value it shows 0x2.

While writing 0x0 to the CM_SLEEPDEP_PER register the processor hangs and never passes executing that instruction seems to be.

Please let us know what clocks shall be active while writing to this register?

Thank you for reading the post and your time.

Regards,

GSR

over 13 years ago

0 Cvetolin Shulev-XID over 13 years ago

TI__Guru 65405 points

Hi,

The describe problem seems strange and I try to reproduce it on my board EVM DM3730. After booting the board the value of the CM_SLEEPDEP_PER register with address 0x48005044 is 6 which corresponds to:

bit 2 - EN_IVA2: 0x1: PER domain sleep dependency with IVA2 domain is enabled.
bit 1 - EN_MPU: 0x1: PER domain sleep dependency with MPU domain is enabled.

I'm using readmem tool for read/write the values of this register. Then I successfully write and read all allowed values: 0, 2, 4 and 6.

Is there something specific which you are doing when observe the problem?

Tsvetolin Shulev

0 1258021 over 13 years ago in reply to Cvetolin Shulev-XID

Genius 5120 points

Hi,

I am clearing it to 0 before entering into standby mode.

We are optimizing the power consumption, hence I was writing this register with a value of 0.

Regards,

GSR

0 1258021 over 13 years ago in reply to 1258021

Genius 5120 points

Hello ALL,

Any suggestions?

Regards,

GSR

0 Renjith Thomas over 13 years ago in reply to 1258021

Guru 31670 points

GSR,

Why are you clearing this register? Is it required to clear this register to enter standby mode?

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Accessing CM_SLEEPDEP_PER register