Hi,
I read the sample code in spra776a.pdf, see below please. At the beginning part, it saves AC1 to memory:
||*AR1+ = AC1 ;Store hard decisions
At the last part, it gets the combined new results for that iteration. Then, on the next loop, the beginning part will store hard decision to memory again.
My question is: why it places the first store at the beginning? It wastes the first memory for a null content, unless the goal is to use the delay slot of the last combined AC1 result. But at the end, it is a simiple register OR instruction. It is not like it needs several delay slots to finish.
The C55 instruction is really strange to me. There are two different instruction formats. I cannot get a clear idea of the code. Could you help me at my question?
Thanks,
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blockrepeat {
T3 = hi(AC0) ;T3 = SD(2*j) + SD(2*j+1)
||TRN1 = *AR0 ;Clear TRN1
; BFLY_DIR ;Compute New_metric(0)&(8)
hi(AC0) = *AR5+ + T3, ;AC0=Old_met(2*j) +T3
lo(AC0) = *AR5+ − T3 ;AC1=Old_met(2*j+1)−T3
||T2 = lo(AC0) ;T2 = SD(2*j) − SD(2*j+1)
hi(AC1) = *AR5+ − T3, ;AC1=Old_met(2*j) −T3
lo(AC1) = *AR5+ + T3 ;AC1=Old_met(2*j+1)+T3
||*AR1+ = AC1 ;Store hard decisions
*********
*AR6 = TRN1 ;Store TRN1 in AC1 (MMR access)
||T3 = *AR2− ;T3=SD(2*j+1)
hi(AC0) = *(AR2+T1) + T3, ;AC0_H = SD(2*j) + SD(2*j+1)
lo(AC0) = *(AR2+T1) − T3 ;AC0_H = SD(2*j) − SD(2*j+1)
||*AR7 = TRN0 ;Store TRN0 in AC3 (MMR access)
*AR4(T0) = lo(AC2), ;Store New_metric(7)&(15)
*(AR4+T0) = hi(AC2)
||AC1 = AC1 | (AC3 <<< #−8) ;Combine hard decisions
}