Needed some help in configuring MAR registers on c67X (L138)
Our memory map is as follows :
* C000_0000 - C1FF_FFFF 200_0000 ( 32 MB) Linux
* C200_0000 - C200_FFFF 1_0000 ( 64 KB) SR_0 (ipc)
* C201_0000 - C202_FFFF 2_0000 ( 128 KB) SR_1 (MessageQ buffers)
* C203_0000 - C2FF_FFFF FF_0000 ( ~15 MB) --------
* C300_0000 - C37F_FFFF 80_0000 ( 8 MB) DSP_PROG (code, data)
* C380_0000 - C3FF_FFFF 80_0000 ( 8 MB) --------
In the dsp.cfg file
Cache = xdc.useModule('ti.sysbios.family.c64p.Cache');
Cache.MAR192_223 = 0x00000000; / nothing is cachable */
For improving the performance we would like to cache the DSP memory C300_0000 - C37F_FFFF 80_0000
Can anyone point me to what value of Cache.MAR192_223 i need to use.
Also in one of the examples the register value used was Cache.MAR192_223 = 0x00000008;
Not sure what part of memory is cachable based on that value
Thanks,
-Vikas
