Hi,
I have 8 boards, each with two C6678 DSP's. Each DSP's VID bus (VCNTL[3:0]) is connected to a UCD9222 via a SN74AVC4T245 level translator.
Out of the sixteen C6678 chips, fifteen are setting their CVDD to 1.103V i.e. the maximum VID value of 63dec. The one remaining device sets its CVDD to 1.058V, VID of 56dec. We are viewing these values in the Fusion Power Designer->Configure->VID Config Tab->VID Code Readings.
It seemed suspicious that so many chips had set their VID to the maximum so we wired a scope to one of the devices and have confirmed that it is setting the VID to 63dec i.e. we see VCNTL[3] go low and high while VCNTL[2:0] all remain high.
Qu. Does it seem credible that such a high percentage of these chips are all using the max VID value, or does this indicate we have a problem?
Cheers,
Richard
