Hi, Champs
My customer want to use AM335x and SPI boot.
Does anyone know the amount of time between PWRONRSTn negate and SPI first access?
Regards, Ishizaki
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Hi, Champs
My customer want to use AM335x and SPI boot.
Does anyone know the amount of time between PWRONRSTn negate and SPI first access?
Regards, Ishizaki
Hi Masakatsu,
If I correctly understand your question, in order to try and boot first from the SPI memory right after PWRONRSTn you have to set the SYSBOOT pins for SPI boot (switches 1-4: 01101). I'm not able to measure the exact time it takes the ROM code to try and boot from the SPI memory.
I measured this to be around 170ms from rising edge of PWRONRST to first SPI access (if SPI0 is first in the boot sequence). Note this will be longer if SPI0 is further into the boot sequence.
regards,
James