Hi,
I'm going to use C6748 DSP interfaced to a FPGA for sampling chain through the UPP interface.
Can anyone confirm that all the data transfer need to be a multiple of 64 bytes?
It seems to depend on the TXSIZEA/B and RDSIZEQ/I configurations (sprugj5b).
This issue is important when considering discontinuous samples flow.
Regards
Laurent.