Hello,
I would like to know if a FPGA could use the shared RAM (128K) of the C6748?
Where could I find documentation on the way to access this RAM and on the access latencies?
Regards.
Laurent.
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Hello,
I would like to know if a FPGA could use the shared RAM (128K) of the C6748?
Where could I find documentation on the way to access this RAM and on the access latencies?
Regards.
Laurent.
Laurent,
Yes, an FPGA can be setup to access Shared RAM through HPI. Aspects of latency through the system interconnect are discussed in the wiki articles:
http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_SoC_Architectural_Overview
http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_SoC_Constraints
http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_SOC_Architecture_and_Throughput_Overview
Check out the Linux SDK for Chip Support Library for HPI. There may not be an example but you should be able to get started using the TRM (Technical Reference Manual).
Regards,
Sunil Kamath