Cannot Cache from DDR3 to L2 on the C6678 using SYS/BIOS

Hi Ryan,

Please check the MAR bits if they are set - sprugw0b.pdf TMS320C66x DSP CorePac User Guide section 4.4.4 Memory Attribute Registers (MARn), you can also check if it works looking in the CCS Memory Browser and see if the data is in the L2 cache,

Thanks,

HR

Hi HR,

1) MAR bits -- The way I was shown to check the MAR bits is using the CFG file or viewing the Cache Module. As I said before, this list is empty, so I don't have a setting to change any MAR bits. How should I set the MAR bits?

2) Memory Browser -- Nothing shows up in the memory browser, it is completely empty. I must have some config, gel, or platform file set up wrong. 

Here is my Configuration file:

var Defaults = xdc.useModule('xdc.runtime.Defaults');
var Diags = xdc.useModule('xdc.runtime.Diags');
var Error = xdc.useModule('xdc.runtime.Error');
var Log = xdc.useModule('xdc.runtime.Log');
var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
var Main = xdc.useModule('xdc.runtime.Main');
var Memory = xdc.useModule('xdc.runtime.Memory')
var SysMin = xdc.useModule('xdc.runtime.SysMin');
var System = xdc.useModule('xdc.runtime.System');
var Text = xdc.useModule('xdc.runtime.Text');

var BIOS = xdc.useModule('ti.sysbios.BIOS');
var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');
var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
var Swi = xdc.useModule('ti.sysbios.knl.Swi');
var Task = xdc.useModule('ti.sysbios.knl.Task');
var Timestamp = xdc.useModule('xdc.runtime.Timestamp');
var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
var ti_sysbios_hal_Cache = xdc.useModule('ti.sysbios.hal.Cache');

/*
* Program.argSize sets the size of the .args section.
* The examples don't use command line args so argSize is set to 0.
*/
Program.argSize = 0x0;

/*
* Uncomment this line to globally disable Asserts.
* All modules inherit the default from the 'Defaults' module. You
* can override these defaults on a per-module basis using Module.common$.
* Disabling Asserts will save code space and improve runtime performance.
Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;
*/

/*
* Uncomment this line to keep module names from being loaded on the target.
* The module name strings are placed in the .const section. Setting this
* parameter to false will save space in the .const section. Error and
* Assert messages will contain an "unknown module" prefix instead
* of the actual module name.
Defaults.common$.namedModule = false;
*/

/*
* Minimize exit handler array in System. The System module includes
* an array of functions that are registered with System_atexit() to be
* called by System_exit().
*/
System.maxAtexitHandlers = 4;

/*
* Uncomment this line to disable the Error print function.
* We lose error information when this is disabled since the errors are
* not printed. Disabling the raiseHook will save some code space if
* your app is not using System_printf() since the Error_print() function
* calls System_printf().
Error.raiseHook = null;
*/

/*
* Uncomment this line to keep Error, Assert, and Log strings from being
* loaded on the target. These strings are placed in the .const section.
* Setting this parameter to false will save space in the .const section.
* Error, Assert and Log message will print raw ids and args instead of
* a formatted message.
Text.isLoaded = false;
*/

/*
* Uncomment this line to disable the output of characters by SysMin
* when the program exits. SysMin writes characters to a circular buffer.
* This buffer can be viewed using the SysMin Output view in ROV.
SysMin.flushAtExit = false;
*/

/*
* The BIOS module will create the default heap for the system.
* Specify the size of this default heap.
*/
BIOS.heapSize = 0x2000;

/* System stack size (used by ISRs and Swis) */
Program.stack = 0x1000;

/* Circular buffer size for System_printf() */
SysMin.bufSize = 0x400;

/*
* Create and install logger for the whole system
*/
var loggerBufParams = new LoggerBuf.Params();
loggerBufParams.numEntries = 32;
var logger0 = LoggerBuf.create(loggerBufParams);
Defaults.common$.logger = logger0;
Main.common$.diags_INFO = Diags.ALWAYS_ON;

System.SupportProxy = SysMin;
Clock.tickPeriod = 100000;
var swi0Params = new Swi.Params();
swi0Params.instance.name = "easyProcessSwi";
swi0Params.priority = 1;
Program.global.easyProcessSwi = Swi.create("&easy_process", swi0Params);
var task0Params = new Task.Params();
task0Params.instance.name = "task0";
task0Params.arg0 = 1;
task0Params.arg1 = 2;
Program.global.task0 = Task.create("&tsk0Fxn", task0Params);
var task1Params = new Task.Params();
task1Params.instance.name = "task1";
task1Params.arg0 = 1;
task1Params.arg1 = 2;
task1Params.priority = 2;
Program.global.task1 = Task.create("&tsk1Fxn", task1Params);

Hi Ryan,

As I assume that your DDR starts at address 0x8000 0000h than you can check the MAR status by starting checking address 0x0184 8200h (MAR 124) you can set the MAR by using module ti.sysbios.family.c66.Cache and using the function Cache_setMar,

In order to see if your data is in the L2 cache than put your data address in the Memory Browser and checking the color,

Thanks,

HR

Hi HR,

I tried to set Mar using Cache_setMar, but it doesn't seem to work. When I first call Cache_getMar, it returns a value of 0 and after setting, then checking that value, it still returns 0. Am I doing this correctly?

Ryan

// get MAR bits
UInt32 mar_val = 99;
uint32_t *pBaseAddr = (uint32_t *)0x01848200;
mar_val = Cache_getMar( pBaseAddr );
System_printf(" Cache Get Mar [ %u ] ", mar_val );

// set MAR
SizeT byteSize = 1000000; // 1 Million Bytes (1 MB)
mar_val = 1;
Cache_setMar( pBaseAddr, byteSize, mar_val );

// check MAR
mar_val = Cache_getMar( pBaseAddr );
System_printf(" Cache Get Mar [ %u ] ", mar_val );

HR,

Do you have any additional advice for this?

Thanks,

Ryan

Hi Ryan,

Please send me your project,

Thanks,

HR

HR,

Here is my project.

Ryan

Hi Ryan,

You mentioned that you configured the platform for - "I also have configured the platform file for L1P 32K, L1D 32K, L2 64K, and Code: L2SRAM, Data: L2SRAM, Stack: L2SRAM." in this case you don't have anything in the DDR3 so there is no need for L2 cache,

Thanks,

HR

Hi,

You are using as base address 0x01848200 that is the address of the MAR register while the APi request the base address of the memory area you want to work on.

That is: Cache_getMar(0x80000000)  -> return 128, that is the index of the MAR register for memory at 0x80000000.

So simple replace base address with 0x80000000 (DDR base address).

Alberto,

I was able to correctly set the MAR register using that proper address. Thank you.

HR,

Sorry, in the project I sent you, I had changed the Platform settings so it wasn't storing data in DDR3. Check out this updated project.

Thanks,

Ryan

Hi Alberto,

I assume you solved the cache issue, any other issue?

Thanks,

HR

HR, 

I still don't understand why I cannot see settings when I open the Cache Module of the CFG file. Shouldn't there be some values listed there? See my attached screenshot, it's all empty.

Ryan