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TMS320c6678 decoupling

Hi,

1)

I am looking at the decoupling recommandations (see SPRABI2B-MArch 2012 page 75 - table 16) and don't understand why the AVDDA1(core PLL) requires 410nF while AVDDA2(DDR PLL) and AVDDA3(PASS PLL) only require 14 nF.

There is also a big difference between  DVDDPCIe and DVDDSRIO,DVDDSGMII,DVDDAIF)

2) Another thing that I don't understand is why in the example given page 75, Fpsw is set to the actual switching frequency (1MHz) and not =to Zmax/2*pi*Lpsw where Zmax=0.2 ohms and Lpsw (depending on the physical board routing) is assumed to be 100nH. This would result in Fpsw=0.2/2*pi*100n  = 318KHz


With best regards,

Bruno