Hi everyone,
I am trying to communicate the DSP C6678 with a Xilinx Virtex 6 FPGA LX130T via PCIe bus. DSP works as RC and FPGA as EP. I am working with the example program within the CD that TI gave me with the DSP.
I have routed a 100MHz clock to the FPGA in order to be able to establish the link.
I receive the message "The link is up". After that, the DSP is supossed to send a message to the FPGA and wait for an echo. However, this echo never comes back. I have put ChipScope in my FPGA, and I have seen that the message received at the transaction level is:
74008001 00000050
00000000 00000000
00000000 797A5771
and rsof and reof are asserted always to '0'.
I think that the DSP and the FPGA are not communicating well.
To check that, I am trying to read the ID register of the FPGA but the values I am receiving are not correct with the expected ones. I am spending too many days trying to fix this problem.
Can anyone help me?
Thank you in advance.