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Impedance for DM365's video in & video out ports

Other Parts Discussed in Thread: TMS320DM365

Wanted to know the various tracking impedance's for Video In and Video out ports of DM365, as per my understanding these video signals are very critical to route in multi layer PCB and hence exact matching impedance must be known, I think of using 75E matching impedance but we need to get exact answer from you.

 Also let me know what other precautions need to be taken while designing PCB using DM365.

Thanks

Prashant Nirmal

  • The DM365 does not have video in (unless you mean the digital inputs?), but the analog outputs should be as closely impedance matched as possible to 75R, yes. This is not always possible due to PCB geometries though, but the closer you get, then better the quality will be.

    You should also use as few vias as possible. Ensure that there is a solid ground plane under the traces from the source to the connector and try to shield the analog traces with ground plane flood and ground vias as much as possible. You can create a Faraday cage is desired by putting the analog signals on an internal layer and placing analog plance above and below the video signals, in addition to ground protection on the same layer as the video.

    The signals should also be trace length matched as close as possible to ensure color alignment, although within a few 100 mils should be fine. There is not usually a reason why these can't be closer matched if you can though.

    BR,

    Steve

  • Thanks Steve!

    Few more queries.

    In the datasheet of TMS320DM365 only DDR2 impedance's are provided.

    We need Impedance details of following pins also:

    1.

    Cin & Yin (video in), HD,VD, PCLK,C_WE_FIELD,

    Tx/Rx serial port,

    DATA0/1/2/3  (SD card Lines),

    NAND Flash pins,

    Cout/Yout pins, VSYNC, HSYNC pins(Video out), etc.

    2. 

    We are using Leopard Imaging's DM365 board. The stack up they followed is different than TI's datasheet. So please suggest which is to be followed.

    PCB stack up Leopard Board Vs. TI Datasheet:

    Layer

    Leopard board DM365

    As per datasheet

    Top Layer

    Routing

    Top Routing Mostly Horizontal

    Inner layer 2

    Gnd

    Gnd

    Inner layer 3

    Routing

    Power

    Inner layer 4

    VCC2

    Internal Routing

    Inner layer 5

    VCC

    Gnd

    Bottom layer

    Routing

    Bottom routing mostly vertical

     Please suggest which PCB stack up we should we follow?

    3.

    Also let us know what other precautions need to be taken while designing PCB using DM365.

    Thanks again!

    Regards,

    Prashant Nirmal

  • All the other signals are CMOS IOs and the input impedances for these signals are high and can effectively be calculated by the input current (see section 5.3 in the DM365 data sheet)

    Likewise the output impedance can be characterized.

    The best method to determine signal integrity though is to use the IBIS models and simulate the design.

    For the stackup the recommendation is as per the datasheet, but it is open to the board designer to use whatever they want as long as they are fully aware of how to design high speed PCBs. Whilst we have recommendations it is still critical that the PCB board designer is experienced and knows what they are doing.

    Typical beginner mistakes are things like the following...
    Make sure all signals have a good, solid reference plane
    Do not have any signals cross gaps in reference planes
    When switching reference planes make sure coupling capacitors are used.
    Make sure signals are length matched where necessary
    Make sure trace impedances are matched where necessary
    Make sure enough decoupling capacitors are used, are the right type and are placed where they will actually do something (i.e. as close to power balls as possible)
    Keep analog signals away from digital signals
    Gaurdband analog signals and use internal shielded layers where possible. Use many stitching vias.
    Many others...

    Basically, do not give this task to a junior designer :)

    BR,

    Steve