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After a Task_sleep(), cannot change uC Pulse Width Modulator register settings

Other Parts Discussed in Thread: SYSBIOS

I am running CCS 5.3.0.00090 with MCU SDK 1.00.01.74, which bundles bios 6.33.04.39 and xdctools 3.23.05.61.

I am running on a Stellaris LM4F230H5QR on a prioprietary board.  I also have the LM4F232 Eval board.  I have the same problem on the Eval board as well.

When I have one task, that that never does a Task_sleep(), I can control the Stellaris register WTIMERA, TIMER_TAMATCHR to change the Pulse Width Modulator duty cycle as expected.

Then, I've added a second task.  This is a static task, and get's enabled by the first task, by changing it's priority from -1 to 10.

This task makes one adjustment to the TIMER_TAMATCHR register, then, goes to sleep using Task_sleep().

After the sleep, it attempts to make another adjustment to the TIMER_TAMATCHR register.  It calls ROM_TimerMatchSet() to do so.

If I "pause" the execution, and examine TIMER_TAMATCHR, it does not have the updated value.

If I disable this task, and go back to the first task, it can no longer set the TIMER_TAMATCHR either.

So, in summary, once Task_sleep() has executed, I can no longer set TIMER_TAMATCHR.

GPIO writes and ADC reads are unaffected by the Task_sleep(), they still work.

Thanks in advance for ideas.

  • Hi Steve,

    Which timer are you trying to modify? By default, Timer 0 is used by SYS/BIOS's system tick interrupt so you wouldn't want to twiddle with that same timer. You can tell SYS/BIOS to use a different timer and try it again.

    In the .cfg file you can tell SYS/BIOS to use a different timer (e.g. Clock.timerId = 2)

    Which StellarisWare API are you using to manipulate the timer?

  • Hi Tom,

    We are using Wide Timer 0 and Wide Timer 1. The SYS Bios *.cfg provides an option to select timers 0 - 7. We had 0 being used.

    I went ahead and tried timer 1, 2, and 3 as well.  Selecting timers 4 - 7 provided an error saying they were invalid (.cfg verification faliure).

    When I told SysBios to use Timer 1 and 2, I had lots of corruption (ROV showed a bunch of issues).

    Timer 3 acted like timer 0, no corruption, and only the first write, before the Task_sleep() would take affect.

    I'm not clear how Wide Timer 0 and Wide Timer 1 map to the eight values for "Timer Id" in SysBios.  The datasheet says I have 6 timers, each with and A and B, and 6 wide timers, each with an A and B.  Do you know how these 24 timers are mapped in SysBios Timer Id?

    I'm not sure what you are asking for about the StellarisWare API to manipulate the timer.  Maybe this is what you are looking for:

     On intialization, we do this:

    // Enable the Peripheral

    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_WTIMER0);  // Wide Timer0 with CCP

    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_WTIMER1);  // Wide Timer1 with CCP

    // Configure the pin function

    ROM_GPIOPinConfigure(GPIO_PC4_WT0CCP0);

    ROM_GPIOPinConfigure(GPIO_PC5_WT0CCP1);

    ROM_GPIOPinConfigure(GPIO_PC6_WT1CCP0);

    ROM_GPIOPinConfigure(GPIO_PC7_WT1CCP1);

    ROM_GPIOPinTypeTimer(GPIO_PORTC_BASE, GPIO_PIN_4);

    ROM_GPIOPinTypeTimer(GPIO_PORTC_BASE, GPIO_PIN_5);

    ROM_GPIOPinTypeTimer(GPIO_PORTC_BASE, GPIO_PIN_6);

    ROM_GPIOPinTypeTimer(GPIO_PORTC_BASE, GPIO_PIN_7);

    ROM_TimerConfigure(WTIMER0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PWM | TIMER_CFG_B_PWM);

    ROM_TimerConfigure(WTIMER1_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PWM | TIMER_CFG_B_PWM);

     

    To change the Pulse Width Modulator value, we do this:

    ROM_TimerLoadSet(pwm_id_map[id][0], pwm_id_map[id][1], Total_ticks - 1);

    ROM_TimerMatchSet(pwm_id_map[id][0], pwm_id_map[id][1], OFF_ticks);

     

  • Hi Steve,

    after some (long) digging around in XDCtools I found that the Clock module can only reference these 4 timers.

    ■ 16/32-bit Timer 0: 0x4003.0000
    ■ 16/32-bit Timer 1: 0x4003.1000
    ■ 16/32-bit Timer 2: 0x4003.2000
    ■ 16/32-bit Timer 3: 0x4003.3000

    The other timers are not defined in XDCtools, which means that there is no conflict between the SYS/BIOS system tick and the Wide timer you're using. And the StellarisWare APIs you've listed don't modify any interrupt either (which is good)...

    Did you install any interrupts (Hwis) associated with WT0? Are they getting cleared?

    Can you check your function arguments when you halt the core? e.g. Do "pwm_id_map[id][0]" array and "pwm_id_map[id][1]" have the correct values? If you modify the TAMATCHR register in the CCS register view, does that change your PWM?

  • Hi Tom,

    The pwm_id_map[id][0] and [1] were being corrupted, so, we were not writing to a valid PWM register.  The corruption was due to a HWI stack over flow.

    Thanks for your help.

    Seve