Boot order for AM3352

Nitesh:

SYSBOOT = 0x401C is the only available MMC1 boot mode (MMC1, MMC0, UART0,USB0). 

Perhaps there is another way using different pin muxing or peripheral instances.

I would recommend you to use this tool to enter and manipulate your pin mux configuration.

http://www.ti.com/tool/pinmuxtool

Send us the output of the File -> Save -> Design from that tool and we may be able to

provide additional assitance.

NOTE: We are trying to get v2.5.2 onto ti.com.  That supports AM335x silicon revisions

1.x and 2.x.

MichaelT

7801.sss_vfinal.dat8321.swig_v5.dat

Michael, 

I have atached the pin mux files for the different configurations that we will be using. 

Basically MMC and NAND boot is priority. If I switch to MMC0 , then full functionality of UART1 will not be available. 

Switch UART3 to IO Set #4 to avoid conflict with spi0_cs1.  Or just don't select spi0_cs1 if it is not needed.

For the dual-EMAC instead of gmii1 & gmii2 use rmii1 & rmii2.  AM335x Silicon Rev 2.x has some additional mux options for rmii2.

Then the only conflict remaining is with gpmc_wpn.  Do you need that signal (write protect)?  For the gpmc_a9 terminal mode 3 is

 "mmc2_dat7_mux0/rmii2_crs_dv_mux2".  That means there is a 2nd level of muxing for this terminal.  You will need to set a register bit

in the peripheral functional block to select the rmii2_crs_dv_mux2 function.  MMC2 shows an IO Set Violation, but you can disregard that error,

because you are really using gpmc_a9 terminal for a rmii2 function.

I saved your original AM335x design file as AM335x Rev 1.x then as AM335x Rev 2.x.  You will need Pin Mux Utility v2.5.2.  That should be

available on ti.com by COB Thursday (2/28/2013).

https://gforge.ti.com/gf/download/frsrelease/1019/6393/PinMuxUtility_v2_05_02_00.zip

You may need to register as a user on the GForge project "pinmuxutility" to pull down that v2.5.2 installer ZIP archive file. 

Register here:

https://gforge.ti.com/gf/project/pinmuxutility/

MichaelT

Please indicate if this has answered your question.  Updated design file attached.

Thank you Michael. I will try out what you have said. 

I will still need help after that to sort out the Boot order issue. 

Thanks and regards, 

Nitesh

Hi Michael, 

Thanks for the new version of Pin Mux utility. 

I saw the pinmux file you edited. I cannot use RMII mode for ethernet , as we plan to have future use of Ethercat on AM3359.  I have seen the schematics for AM335X ICE kit, but still have doubts over those pins. 

But my main issue is still the arriving at the desired Boot Order. I have to use the full UART1 port, so cannot use MMC0 , so switched to MMC1. And I will be using NAND Flash onboard too, and hence the problem.  

If it is possible to arrive at some other boot order other than that mentioned in Table 26.7 of TRM involving  NAND,MMC1, UART0 , it will be great.

Pointers in this direction from you or anyone else will be appreciable.