L138 (ARM side) crushed during entering in interrupt

I wrote a simple code  with interrupt from GPIO0 for ARM core and try to debug it with SAU510 JTAG debugger. ARM is in  Supervisor (SVC) mode. External pulse source connected to GPIO0 input.

L138 responding when the pulse come to GPIO input  but program counter of ARM passed  to strange address 0xFFFD5990 and hanging. If I suspending (pause) the debug  I can see that proper bits are set in AINTController registers.  Also ARM is in SVC mode but both I and F bits is 1 in CSPR, i.e. both IRQ and FIQ disabled.

What's wrong?

void INTInit(void)
{
    //PINMUX1_INT_ENABLE
    unsigned int savePinmux = 0;

    /* Enable GPIO */
    PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_GPIO, PSC_POWERDOMAIN_ALWAYS_ON, PSC_MDCTL_NEXT_ENABLE);

    /* Read pinmux and clean pins  0[6], 0[7] */
    savePinmux = (HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) & \
                        ~(SYSCFG_PINMUX1_PINMUX1_7_4) & \
                        ~(SYSCFG_PINMUX1_PINMUX1_3_0));

    /* Enable in pinmux pins  0[6], 0[7] in GPIO 7 8 */
    HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) = \
        (PINMUX1_INT_ENABLE | savePinmux);

    /* Set GPIO 7 8 as input */
    GPIODirModeSet(SOC_GPIO_0_REGS, 7, GPIO_DIR_INPUT);
    GPIODirModeSet(SOC_GPIO_0_REGS, 8, GPIO_DIR_OUTPUT);

// Initialize the ARM Interrupt Controller.
        IntAINTCInit();

// Enable IRQ in CPSR.
        IntMasterIRQEnable();

// Enable the interrupts in GER of AINTC.
        IntGlobalEnable();

// Enable the interrupts in HIER of AINTC.
        IntIRQEnable();


  // Register the ISR in the Interrupt Vector Table.
        IntRegister(SYS_INT_GPIOB0, Tx_intrpt);

  // Map the channnel number 2 of AINTC to GPIO BANK 0 system interrupt.
        IntChannelSet(SYS_INT_GPIOB0, 6);

  // Enable the System Interrupts for AINTC.
        IntSystemEnable(SYS_INT_GPIOB0);

   //   Configure rising edge and falling edge triggers on pin 7 8 to generate an interrupt
            GPIOIntTypeSet(SOC_GPIO_0_REGS, 7, GPIO_INT_TYPE_RISEDGE);             

     //    Enable interrupts for Bank 0.
           GPIOBankIntEnable(SOC_GPIO_0_REGS, 0);

}

UPD:

This code is Interrupts initialization part of the code. I'm not using any OS.

Almost whole code consists from examples that supplied along somewhat board ( I'm not wrote this code initially but I'm try to develop it). Now I'm debugging customized board within L138.