Hi,
I am testing SPI0 of omapl138 DSP core on a non operating environment. I configured the SPI0 to be 3 pin slave mode and PINMUX to be SPI.
However, once I configured SPI0 related registers and enable it at the last step, a new data (which is 0xffff) is received even without hooking the DSP with my external SPI master. And the DSP just keeps receiving data (which is always 0xffff).
Then, I probed the SPI0_CLK pin, I found that this pin is not high impedance (which it should be when in slave mode shown in the manual), instead, it is very high frequency clk). And SPI0_SIMO is always high (which again should be high impendance when in slave mode). This is probably the reason that makes DSP keep receiving 0xffff;
Further, I run the code step by step. I found that the SPI0 CLK_IN is changing alternatively between HIGH and LOW. If I connect CLK pin with +VD, then it will remain HIGH. If I connect CLK pin with GND, it still changes.
I was wondering is it possible due to Pull up resister or Open drain issues? Does anybody have any clue?
Thanks,
Fu