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AM3874 and 512M DDR3: Problem with ti816x_hdvpss.xem3

Other Parts Discussed in Thread: AM3874

Hello,

i have custom board with AM3874 and 512MB DDR3 under Windows Compact 7 OS.
DDR3 512MB (32-bit with) connected to DDR0 channel.

Problem is in memory map for VPSS Cortex-M3 co-processor firmware. I have linear memory hole from 0x8000 0000 till 0xA000 0000 (512 MB).
But in ti816x_hdvpss.xem3.map exist sections which using space from 0xA000 0000 (like HDVPSS_DESC_MEM, HDVPSS_SHARED_MEM, FRAME_BUFFER_MEM, WINCE_RESV2_MEM)

Is exist possibility to avoid this? (my idea is to setup LISA for mapping first 256MB to 0x8000 0000 and 2nd 256MB to 0xA000 0000 - is this possible?).

In XLDR (platform.c) i found mention about board with 512MB. For this configuration was used next:

        /*
         * Program the PG1.0 DMM to Access EMIF0 and EMIF1
         * Two 256MB sections with 128-byte interleaved (hole in b/w)
         */
        OUTREG32(&pDmmRegs->DMM_LISA_MAP__0, 0x0);
        OUTREG32(&pDmmRegs->DMM_LISA_MAP__1, 0x0);
        OUTREG32(&pDmmRegs->DMM_LISA_MAP__2, 0x80440300);
        OUTREG32(&pDmmRegs->DMM_LISA_MAP__3, 0xC0440300);

Please, give me advice.