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How much does DSP/BIOS contribute to the CPU Load?

Other Parts Discussed in Thread: TMS320VC5502, TMS320C5505

How much does DSP/BIOS contribute to the CPU Load?

I am porting a legacy application to a new platform requiring a significant reduction in CPU clock frequency due to power constraints.

Legacy Platform:

RTOS: DSP/BIOS 4.90.270
IDE: CCSv2.21
Target: TMS320VC5502
CPU Clock Frequency: 294.912 MHz


New Platform:

RTOS: DSP/BIOS 5.42.0.07
IDE: CCSv5.3.0.00090
Target: TMS320C5505
CPU Clock Frequency: 65.536 MHz

 

In the legacy application, I enabled custom CPU Load measurement code that my predecessor implemented.
According to that, the CPU Load on the legacy application runs near 49%.

I figure this scales to an impossible CPU Load of (49%)*(294.912 MHz/65.536 MHz) = 220.5% on the new platform.

I am profiling the legacy code to better understand what will fit within our sample rate deadlines and what will not.
So far, I can account for approximately 30 percentage points of the 49% CPU Load.
That leaves 19 percentage points unexplained.

Would you expect DSP/BIOS to consume 19 percentage points of CPU Load?

 

I tried disabling the custom CPU Load measurement code and enabling the CPU Load graph in CCSv2.21, but there are some complications there. I will post a separate question about that.

 

  • Hi Patrick McCloskey,

    The CPU load of BIOS itself should be much lower than 19%.  When there is nothing happening in the system, BIOS will just idle in the idle thread.  So, if one were to create an app that had no tasks and didn't do anything but run the idle task, I would expect the load to be just above 0%.

    When an actual app is present and _doing_ something, there will be task switches, interrupts + ISRs running, etc. which will of course cause the load to increase.  In addition to the application load, there is additional overhead because BIOS has to perform a context switch.  But this should also be minimal.

    What could cause the context switching overhead to increase would be something like task or interrupt thrashing.  Could that be happening in your app?

    Also, have you seen the stair step example?  This example creates CPU load in incremental stages which results in "stair steps" displaying on the CPU load graph.  You could play with that example's load values to see how it affects the CPU load.  You should have it in your BIOS installation.

    Steve

  • My hunch is there is not significant task or interrupt thrashing. But I am still poking around. If I want to turn on RTDX for the CPU Load Graph in CCSv2.21, I need to relocate something so my .text section will fit in the available on-chip memory. When time permits, I will try that again.

    I probably test drove the stair step example at some point over the years. I find it in the bios_5_42_00_07 examples from my CCSv5.3 installation. I'll take a closer look.