TMDXEVM3358 SD/Nand Boot DIP switches

John Reid

Other Parts Discussed in Thread: AM3358, TMDXEVM3358

Hello,

we are using the TMDXEVM3358 EVM which has DIP switches which control whether the EVM boots from SD Card or NAND Flash. What do these DIP switches do to affect where it boots the XLDR/MLO from? Which bit of boot code is affected by these DIP switches, is it the internal bootrom within the AM3358 processor?

We are designing a board containing the AM3358 processor, with SD Card and NAND Flash capabilities and I would like to know how I would get the processor on this board to attempt to boot XLDR/MLO from SD Card as per the EVM implementation.

Thanks

John

over 12 years ago

0 Biser Gatchev-XID over 12 years ago

TI__Guru**** 393215 points

Hi John,

The EVM has two sets of DIP switches: SW3 and SW4 on the Baseboard are the SYSBOOT[15:0] signals, which you need to configure on a custom board. Then SW8 on the Daughterboard is for CPLD configuration, which is used for enabling different EVM profiles (this is EVM specific and doesn't concern a normal custom board). Here are some useful links to help you understand how it works:

http://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_HW_User_Guide

http://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_Board_Design_Files

For SYSBOOT settings you should check the AM335X Technical Reference Manual, section 26 (particularly Table 26-7). The SYSBOOT signals are the ones that are strapped at reset release time, and used by the internal ROM code to determine system configuration and boot order.

0 John Reid over 12 years ago in reply to Biser Gatchev-XID

Intellectual 610 points

Thanks, I hadn't been aware of the SYSBOOT signals and their functionality so am currently reading this section of the reference manual now and can see that they are involved in choosing where to boot from.

Thanks.

0 John Reid over 12 years ago in reply to Biser Gatchev-XID

Intellectual 610 points

Hi,

A question related to the table 26-7. When the SYSBOOT[4:0] signals and hence the CONTROL_STATUS register bits [4:0] are all low (0), the SYSBOOT configuration table 26-7 labels this configuration as 'Reserved'. Do we have any idea what will happen with this configuration or is it 'undefined'?

Thanks

John

0 Biser Gatchev-XID over 12 years ago in reply to John Reid

TI__Guru**** 393215 points

Hi John,

There is no official support for reserved configurations and they must be avoided.

0 John Reid over 12 years ago in reply to Biser Gatchev-XID

Intellectual 610 points

Hi Biser,

that's what I thought. Thanks for your help on this matter.

Regards

John

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TMDXEVM3358 SD/Nand Boot DIP switches