Decimation in a DSP

Why would you oversample by a factor of 1000 just to throw the samples away?  Why not just sample at 20 kHz?

Bill,

Because when you oversample and then decimate you get significant processing gain [an significant improvement in SNR].

Rob

I take it then you are going to do some averaging or FIR filtering with the 1000 sample blocks?  If you want advice regarding which DSP to use, you'll need to specify more details of the algorithm so we can compute the processing load.

What is the bit depth of the samples? 

Bill,

Correct, FIR filtering to resample or decimate the signal by factor 1000x.  

The samples are 12 bit at 20 MSps.  The information bandwidth of the data is about 25 KHz including  [5 KHz.]  channels within that bandwidth [from a satellite].   The goal is to use oversampling of about 1000x to add significant processing gain.   

This decimation filter goes into a high-volume, consumer electronics product.   So, I am looking to learn how to spec the DSP to find the device that can do the job at a good price.

Many thanks for the assistance.

Rob

Rob,

 How many taps for the FIR?  Is this continuous processing, or burst?

If you want to use a C55x series DSP, you will need more than 0.5 cycles for each tap*sample.  From TI's DSP Lib documentation, the number of cycles of fir2 is:

nx * (3 + nh/2)

where nx is the number of samples in the input buffer, and nh is the number of taps.  So, for 1 second's worth of data, for a filter of 10 taps you would have

nx = 20e6

nh = 10 

cycles = 160e6 

which would be achievable with some in the family.  If you want many more taps, you would have to go the C6000 series, which has more clock cycles and can do 8 MACs per cycle, but consumes more power.  It also has its own forum.

Bill 

Bill,

Thank you.  It is wonderful to have some example math to work with.  Let me now do some homework to see what I understand.

Rob

I have done real-time decimation by a factor of 2250 with a sample rate of ~ 5Msps on a 'C5509A, so I think there is some hope for your application. The trick is to do the decimation in multiple steps. At high rates, you must use short filters and wide transition bands. As the sample rate comes down, you can afford to use longer filters and tighten up the transition band. 

When I was estimating the DSP load, I built a simple spreadsheet with filter lengths, sample rates, and resulting DSP loads. I also kept track of buffer sizes and interrupt rates. If you assume some interrupt and task swap overhead, you'll quickly see how longer buffers help you at high sample rates (until you run out of RAM).  On the 'C55xx DSP's not all RAM is created equal and dual access RAM allows special dual-MAC instructions. Also take care that your input and output buffers are always in different RAM blocks so you don't get memory contention. 

The most important thing to understand is that decimation filters should run at the output rate and should not compute any samples you don't actually need. Standard library FIR filter code doesn't do this, but a dedicated decimation filter routine might. At 20 Msps, chances are you'll want to write your own decimation code in assembly language. That's what I did, but I only wrote one routine that took its ratios and coefficients out of a structure so it could be used at all sample rates. 

The book Multirate Signal Processing for Communication Systems by fred harris is not a bad resource.

David L. Rick

Hach Company