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About MB group processing in H.264 HP encoder library



Hi,

We noticed that in H.264 HP encoder, a group of 8 MBs are processed

together. We understood that by processing a group of MBs together, it

 will save some processing overhead thus some DSP cycles, but it may

 cause some quality loss since the left MB contexts (final mode

information, reconstructed pixels etc.) of some MBs in the same group

 may not be available. So we would like to have a better understanding

 what is the real tradeoff between a group of 8MBs vs. 1MB (how much

 cycles saved, and how much quality loss etc.). Would you please share

some insights on this issue?

Thank you very much!

Sunzhao

  • Hi Sunzhao,

    Current H264HP encoder will work on group of 8 MBs. This is done basically to exploit Cache, EDMA,  and CPU software pipeline mechanism. 

    Yes when we process 1MB at a time, encoder can use better estimations for Intra/Inter costs and mode decisions. This we are expecting it to be ~5% bit rate savings when compared with group of 8 MBs.

    Regarding performance impact, we did not analyse much as the basic design(Group of MBs processing) at MB level concept is carried out from legacy codecs(H264 BP encoder)

    Regards

    Rama

  • Hi Rama,

    Thanks for the information.

    I have some follow-up questions: do you expect any significant issue (for H264HP on C6678)

    if we do want to save the 5% bit rate by processing 1MB at a time? Do we still be able to achieve

    the same or very similar throughput? Furthermore, does TI have the plan to change the H264HP

    library to process 1MB at a time to further save bit rate if it doesn't hurt the throughput much?

    Thank you very much in advance for any insights you could share on these questions.

    B.R.

    Sunzhao

  • Hi Sunzhao

    Sorry I missed to reply to this mail.
    By analyzing the code, it is difficult to get similar performance with 1MB processing, to meet similar throughput we need to change design of the codec, including optimized kernal changes(which are written keeping N MB processing in mind).

    I do not think TI has any plans to change design to implement 1MB processing at this moment.

    Regards
    Rama