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C6678 emif16 1.8V->3.3V

Other Parts Discussed in Thread: SN74CB3Q16210

Hi,everyone

I'm trying to connect my 6678EVM to FPGA by EMIF16(CPU clock is 1GHz,so EMIF16 clock is about 166.7MHz)and I met a problem.

The I/O on 6678EVM board is 1.8V and I have to changle it to 3.3V considering FPGA's voltage requirement.

Someone suggests me to use a pull-up resistor, it seems quite easy but I'm worrying about its performance,what parameters should I consider when doing such level shift?And is it much better to use a level shifter instead of pull-up resistor?

I've found someone else discussing time delay when using a level shifter,but I know little about it,is it quite important when I connect C6678 to FPGA?

I'm not familiar with connecting DSP to other facility = =,Could anyone spare me some time to help me out?I'll be very grateful.

Zhao

  • Hi Zhao,

    The EMIF16 interface on the C6678 uses 1.8V LVCMOS IOs.  They are not 3.3V tolerant and connecting them directly to 3.3V IOs on your FPGA could damage the IO buffers.  You will have to use a level converter to connect to your FPGA interface.  We have used the SN74CB3Q16210 FET bus switch for this purpose on other designs.  Note that most FPGAs allow you to select the IO voltage for their IO banks.  You should check with the manufacturer to see if this is a possible solution.

    Regards, Bill