Problem with PLL stability with c5515 Processor

To back the above data

 Shyam and I have tried measuring the clock out . While looping in the

"
while ( (PLL_CNTL3 & 0x0008) == 0);" the clock out gives 32.768Khz.

If we bypass the while loop and replace it with a 6ms delay cycle.Then once

"CONFIG_MSW = 0x1;".................. is executed clock out turns out to be 100Mhz.

Why is the stability bit not set for this particular board?? Its a BGA package and hard to probe on what is missing?? Please help us understand the issue.

a small addition further up on bypassing PLL the processor is further not able to reset the peripherals 

void EnablePheripheralClock(Uint16 byvalPclk1 , Uint16 byvalPclk2, int dMode_m)
{
int i = 0;
// enable all clocks
IDLE_PCGCR = byvalPclk1; //1C02
IDLE_PCGCR_MSW = byvalPclk2; //1C03
// reset peripherals
PER_RSTCOUNT = 0x20;

if(dMode_m == 1)
{
PER_RESET = 0x0091; //voice mode reset
}
else
{
PER_RESET = 0x0086; //ready mode reset
}
while(PER_RESET != 0x0000 );// this is where the processor stucks up
for (i=0; i< 0xFFF; i++);
}

1) Using bit 3 of 0x1C22 to monitor PLL lock status is not supported in C5515. This is a feature of the VC5505, the previous generation of C5515. C5515 specifiied a 4ms PLL_LOCKTIME. C5515 must be programmed to 0x0806 for proper operation. Please refer to C5515 System User's Guide section 1.4.3.3 for details.

"Initialization bits for the DSP clock generator. These bits are used for testing purposes and

must be initialized with 0x806 during PLL configuration for proper operation of the PLL."

2) For PLL Bypass switching, please refer to System User's Guide section 1.4.3.2.1.

Regards.

we have tried to bypass PLL by giving a 4ms delay but it even doesnt helped us the processor again stuck at peripheral reset as shown above in code .....what may be the reason

What Address is PER_RESET?

Actually, what exactly are you trying to do? The 4ms LOCKTIME is to guarantee the PLL will lock after reprogramming.

Regards.

PER_RESET is 0x1C05 in C5515 what i am exactly trying is to set the PLL to 12Mhz after that i will enable the peripheral clocks and wait for PER_RESET=0x0000

but i am not really able to understand what exactly is the problem 

It looks like you have programmed the COUNT in 0x1C04 to 0x20. What is the value of 0x1C05 in the loop?

Can you try changing the COUNT to 08h and added the repeated NOP as stated in section 1.7.5? 

"To reset a peripheral or group of peripherals, follow these steps:
1. Set COUNT = 08h in PSRCR.
2. Initiate the desired peripheral reset by setting to 1 the bits of PRCR.
3. Do not attempt to access the peripheral for at least the number of clock cycles set in the PSRCR
register. A repeated NOP may be necessary."

Regards.

no it is looking like some other problem i usually connect my board with c5515 through a connector i interface it to a JTAG xds100 debugger tool,

so this stucking up at pll occurs while debugging,after some time it gets normal and when ever i restart my board the problem comes again 

what actually can be the problem i have made about 20boards based on ezdsp all of them behaving the same where does the fault lie in very peculiar behaviour

Are you seeing the PLL locktime at power up? Have you scoped the CLOCKOUT pin?

Regards.