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OMAP-L138 timerCounter.c Period

Other Parts Discussed in Thread: OMAP-L138

Hello,

I'm trying to start with the lcdkOMAPL138/timer/timerCounter.c example from StarterWare, and I'm having a hard time tracking down what the actual frequency is, not in clock cycles, but in Hz. More specifically, I'm trying to modify this example to have the interrupts occur at a 120kHz rate. I've looked through the TRM to realize that the internal clock source for the timers is the AUXCLK, which is fed from PLL0, but I'm having a hard time tracking down the frequencies between each of the dividers.

It seems like the example is just using default values, but what frequencies do these produce? Knowing those would better help me understand what the period is being set to in seconds(or micro-seconds) with the TMR_PERIOD_LSB32 value of 0x07FFFFFF. I apologize if I am missing just missing an obvious piece from the TRM.

Any help is greatly appreciated,

Reagan

 

  • Hello,

    Have you been able to get any input on this?

    Thank you,

    Michelle

  • The timerCounter.c example uses TMR2. The input clock is SYSCLK/2. With SYSCLK = 300MHz, the input clock would be 300Mhz/2 or 150Mhz. I am guessing the TMR_PERIOD_LSB32 value of 0x7FFFFFF or 134217727 is some sort of rough approximation of 150000000. Perhaps it is less than 150000000 to allow for the overhead in the code. StarterWare is full of such magic numbers. The period should be 1/150000000. In theory, for 120Hz, load LSB with 150000000/120 = 1250000.

    All other StarterWare code uses the timer utility in sysdelay.c. That code uses TMR0 and it's input clock is AUXCLK. The LCDK uses 24KhZ. This matches the sysdelay.c TMR_PERIOD_LSB32 value of 0x5DC0 or 24000.  The period should be 1/24000. In theory, for 120Hz, load LSB with 24000/120 = 200.

  • Hi,

    I've tried the below hot menu in the GEL script to check the SYSCLK (3,4,5,6,7) output frequencies via CLKOUT pin in OMAP-L138 lcdk board.

    #define SYS_BASE 0x01C14000
    #define KICK0R *(unsigned int*)(SYS_BASE + 0x038) 
    #define KICK1R *(unsigned int*)(SYS_BASE + 0x03c)
    #define PINMUX13 *(unsigned int*)(SYS_BASE + 0x154) //PINMUX13

    #define PLL0_BASE 0x01C11000
    #define PLL0_OCSEL *(unsigned int*) (PLL0_BASE + 0x104) /*OBSCLK Select Register*/

    menuitem "OBSCLK"
    hotmenu Enable_Obsclk_Freon( )
    {

    KICK0R = 0x83e70b13; // Kick0 register + data (unlock)
    KICK1R = 0x95a4f1e0; // Kick1 register + data (unlock)

     

    PINMUX13 &= 0xFFFFFF0F; 
    PINMUX13 |= (1<<4); 

    /* Tap Point E REFCLK (CLKIN/OSCIN) */

    PLL0_OCSEL = 0x19;

    GEL_TextOut( "\Enabled Obsclk ....Done.\n\n" );
    GEL_TextOut ("\Check the SYSCLK3 output at Test Point TP6.\n\n");
    GEL_TextOut ("\To check other SYSCLK (4,5,6,7) output change the PLL0_OSCEL value in the Gel script.\n\n"); 
    }

    Copy and paste the code in the GEL file you have and execute the OBSCLK hot menu (script) form the CCS then you will get the clock output for SYSCLK3 under Test point (TP6) which is under back side of the LCDDK board.

    Change the PLL0_OCSEL = 0x19; value for different SYSCLK output  

    Example for

    SYSCLK4 =0x1A

    SYSCLK5=0x1B

    SYSCLK6=0x1C

    SYSCLK7=0x1D

     

    Thanks

    Antony

  • Hello,

    Have you been able to resolve this issue?

    Thank you,

    Antony