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Memory map for AM3874 custom board

Other Parts Discussed in Thread: AM3874

Hi,

My AM3874 custom board has 2GB memory. I was able to update VPSS/syslink and Linux boot parameters to run VPSS with HDMI display. It works fine with below settings:

- LISA settings in u-boot:

#define DDR3_DMM_LISA_MAP__0         0x0
#define DDR3_DMM_LISA_MAP__1         0x0
#define DDR3_DMM_LISA_MAP__2         0x80640300
#define DDR3_DMM_LISA_MAP__3         0xC0640320

- bootargs for kernel:

console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=<something> rw notifyk.vpssm3_sva=0xBF900000 sbufaddr=0xBFB00000 vram=50M ti814xfb.vram=0:16M,1:16M,2:6M mem=364M mem=320M@0x9FC00000 mem=960M@0xC0000000

For some reason, I cannot pass mem=1024M@0xC0000000 as last parameter (booting hangs immediately after kernel decompression). Somebody knows why?

Also, I am pretty sure I can further optimize these settings not to waste almost 400M for unnecessary regions. My board uses only HDMI display (frame buffer 0), does not have video capture interface. Also, since this is only AMXXXX core, there is no DSP and M3 core on board. Can somebody confirm that I can safely "overwrite" by Linux memory settings below regions:

  1. CMEM@0x96C00000
  2. DSP_ALG_HEAP@0x98000000
  3. IPC_SR_HOST_DSP@0x99400000
  4. DSP_DATA/CODE@0x99500000
  5. MC_HDVICP2_INT_HEAP_CACHED (VIDEO_M3_INT_HEAP_CACHED)@0x9BD00000
  6. Reserved - MC-HDVICP2 Firmware@0x9DD00000

It would save me ~90MB. Any other advices very welcome.

Regards,

Greg

  • Hello,

    I am not familiar with memory map.

    In this EZSDK memory map wiki page (http://processors.wiki.ti.com/index.php/EZSDK_Memory_Map) we have:

    2GB physical memory is mapped using register 3 and 4. Register 1 and 2 are unused.

    • System Address 0x80000000 is mapped to physical address 0x00000000
    • System Address 0xC0000000 is mapped to physical address 0x20000000
     http://processors.wiki.ti.com/images/2/2e/LISA_Mapping_2GB.PNG
    Following code programs the LISA registers for 2GB physical memory (default configuration).
    /* Program the DMM to for 2 GB (interleaved) configuration */
    __raw_writel(0x0, DMM_LISA_MAP__0); /* Register 0 is unused */
    __raw_writel(0x0, DMM_LISA_MAP__1); /* Register 1 is unused */
    __raw_writel(0x80640300, DMM_LISA_MAP__2); /* Register 2 maps 0x80000000 to 0x00000000, length 1GB */
    __raw_writel(0xC0640320, DMM_LISA_MAP__3); /* Register 3 maps 0xC0000000 to 0x20000000, length 1GB */

    Are you programming these recommended for 2GB values in the DMM_LISA_MAP__2/3 registers ?

    Please note that this case is valid if you are planning to use the two EMIF controllers (EMIF0 and EMIF1) in interleave mode.

    I also suspect that you will have to modify the ldrmemcfg_ddrSize unsigned integer variable (from file memsegdef_default.c) like below

    /*----------------------------- Memory Segment configuration -----------------*/
    #include <ldr_memseg.h>

    //uint32_t ldrmemcfg_ddrSize = LDR_DDR_SIZE_1G ;
    uint32_t ldrmemcfg_ddrSize = LDR_DDR_SIZE_2G ;



    Are you on EZSDK or DVR RDK ?

    For DVR RDK, we have something here:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/222065/785724.aspx?Redirected=true

    two options:

    1. Linux Memory 468MB : in boot args mem=128M mem=340M@0xC0000000

     2. Linux Memory 568MB : in boot args mem=128M mem=440M@0xC0000000

    If you are on EZSDK, you can still try with these.

    Best Regards,
    Margarita