help, DM8168 dsp cpu cost tool much?

wang wang1

the dsp run at 794M, and i test it on evm DM8168(+DaughterCard), 1channel 1080p60 input and encode.
on default usercase, the osd and scd usage is 5.3%.

after i add some code before osd:

Int32 AlgLink_MYalgProcessFrame(FVID2_Frame *pFrame)
{
unsigned char *yStart = (unsigned char *)(pFrame->addr[0][0]);
int i;
for(i = 0; i < 1920 * 1080; i++) {
*yStart *= 2;
yStart++;
}
return 0;
}

the cpu usage is 51.6%(1 channel 1080p60).

i want do some hue,saturation adjust(AD chip not support), 4 channel 1080p30, does it appropriate?
thanks.

over 12 years ago

0 Badri Narayanan over 12 years ago

TI__Guru 59700 points

If you access a 1080P frame via CPU it is expected to take huge cycles as it will clear the cache completely and it would be like fetching each pixel from DDR which can take upto 100 cycles per DDR access.

If you want to operate on HD resolution frame you should DMA a frame to internal L2 a few lines at a time, operate on L2 and DMA out the updated frame.You will also have to parallelize the DMA with CPU processing by having a ping pong buffer. We don't have any example code for this in DVR RDK though.

0 Brijesh Jadav over 12 years ago in reply to Badri Narayanan

TI__Guru**** 475745 points

Hi,

we have a support for these controls on the display, you could change these controls using VDIS api vdis_setColorControl.

Regards,

Brijesh Jadav

0 echo yang over 12 years ago in reply to Badri Narayanan

Intellectual 730 points

Hello,

Narayanan

Could you tell me how to use the L2 cache to do video process?

I don't know how to allocate or free buffers in the L2 cache.

And with the example of video copy, I cannot find where L1 cache is used, nor the segments like .bss, .stack.

Could you give an instruction to these problems?

Regards,

Yang

0 Badri Narayanan over 12 years ago in reply to echo yang

TI__Guru 59700 points

I don't understand the question. L2 cache is automatically used by the GEM cache controller. There is nothing you have to do apart from configuring L2 cache size.If you want to place critical code/data in L2 SRAM then memory map configuration depends on the SDK you are using. I can provide details if you are using dvr rdk.If you are using ezSDK / Codec Engine pls create a new thread and experts working on CE/exSDK will be able to answer.