This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DM368 intermittent boot issue

I have a couple of boards board using the DM368 that intermittently boot. I can generally get them to boot eventually by power cycling or holding the reset line low.

So far, I have checked:

1. Power up power sequencing is correct and power is stable

2. Boot mode selection voltages are correct 

3. The reset is held low and then rescinded by an external part (MIC812). The reset line looks OK on the scope happening a fair amount of time after the power si applied and stable

4. TRST is locked low

Where else should I be looking ? Is there an easy way to read the DM368's mind as to why it doesn't want to begin the boot sequence ?

  •   It looks like the issue is caused by the signal named PWRST, it’s grounded in the schematics. Please Refer to the document in link below section 1.4.1.1 PRTCSS Initialization Sequence in Normal Mode for more details. Please let me know whenever you get some results.

    http://www.ti.com/lit/ug/sprufj0b/sprufj0b.pdf

     Thanks!

     Phil Yi

  • Phil,

    I think this would certainly be the case if we were operating the device in "normal mode" with external battery. This design does not include backup battery or use internal DM368 power sequencer. Within the document you referenced is this:

    1.4.2 External Reset Mode

    The PRTCSS will work in this mode if the PWRCNTON input pin is held at 1 and the PWRST pin is held
    at 0. Power on/off and reset for the DM36x device should be done externally, as the PRTCSS has no
    control over them. The device reset signal (RESETz) will reset the PRTCSS. The SEQ cannot be used in
    this mode.

    This is the mode we are using.,The power sequencing is provided externally to the device and the reset should be provided via an external reset circuit (with the MIC812). My take on the PRTCSS module is that if I run with PWRST locked low and PWRCNTON pulled high, I should disable the module and it should not be involved in my reset process in any way. Is this incorrect or superseded by errata somewhere ?

  •    Good response! 

       So far, I can't find any reference design using External Reset Mode, but many are using operate in Normal mode. Can you try your board in Normal mode?

       If you have to use External Reset Mode, would you please share more details of what exactly you means by “intermittently boots”?

       How bout also share us some scope captures for the power rails & the reset lines?

       Thanks!