Best practice for disabling all interruptions

asm(" dint");

asm(" rint");

It is OK for non-nested case. However for nested cases you should save/restore interrupt state to disabe/enable it correctly.

Hi,

It is not clear to me the difference you meant between DSP level and single core level.

The CSL Global disable/enable routine operate at CPU (single DSP CPU level). Without using the CSL, you can use the compiler intrinsic _disable_interrupts()/_enable_interrupt() and _restore_interrupts().

The main difference between intrinsic and CSL is that intrinsic disable use the CPU intruction DINT that also affect the SGIE bits (disable and save previous state). It also return the whole contents of CPU CSR. When you use this value calling _restore_interrupts(), the whole content of CSR is restores, so you can loose asny change to CSR you make between the two call (normally this is not a preoblem). _enable_interrupts() behave like the CSL version.

So usually you will create critical section in this way:

    unsigned int saved=_disable_interrupts();

    _restore_interrupts(saved);

If, with "single core level" you mean disabling external interrupt source (by the point of view of the CPU), that is the EVENTS, note that all the CPU interrupts (but NMI and exceptions) come from the events so it is the same that disabling at CPU level.

Hi Alberto,

Thank you for your answer.

First, the difference between DSP level and core level.
To me, if I disable interruptions at DSP level that means none of the 8 cores of the C6678 will get interrupted.
At core level, I mean that only core X will not get interrupts.

I'm thinking about an use case where core 0 would need to disable interrupts during a critical section but in the meantime not break the core 1 which is receiving data via interruption from an external source, and not break core 2 which is moving data via EDMA with interruptions.

In that case would _disable_interrupts break things (if used by core 0) or not ?

I'm not sure I understand the last part of your post about events.

Thank you

CM

Hi,

As far as I know there is no way to disable all cores interrupts from one core.

Your only option is the single core level, that is what both CSL and instrinsic do and it is what you need.

About the event: i was simple tring to guess what do you mean with DSP and single core level, since all the external interrupt to the CPU are the translation of an event as programmed in the single corepac interrupt controller.

Ok good to know.

Now if someone from TI could confirm there is no way to disable all cores interrupts all at once, that would be great.