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C6748 Secondary Bootloader - How to Initialize PLL and DDR/EMIF

JumpStart
Intellectual 605 points


Hello E2E Community,

Our OEM platform consists of a C6748 and a DM368 that communicates over a Dual Ported RAM (DPR) implemented by RAM blocks in a FPGA.  The C6748 does not have flash memroy and is configured to boot via NOR Legacy mode using the DPR as the NOR memory.  This mode is as described at wiki site http://processors.wiki.ti.com/index.php/Secondary_Bootloaders_on_OMAP-L1x.  Our secondary bootloader is written by the DM368 into the DPR.  When the C6748 runs it reads the secondary bootloader code into L2RAM and gets executed.  The secondary bootloader subsequently uses the DPR to load the actual application into DDR to execute it.

Since I am currently using CCS5 and JTAG to debug the application, it is working correctly.  It is clear that CCS5 and JTAG uses the GEL file to initialize the C6748 hardware (PLL and DDR/EMIF).  The procedure I am taking is that the secondary bootloader applies the common PLL and DDR/EMIF settings than copies the application to DDR and execute it.

I am generating the secondary bootloader binary image according to the instructions at the wiki site but I am not clear as to where the GEL file initialization procedure is put.  Does the initialization gets put automatically into the final bootloader binary image?  If not where in my secondary bootloader do I perform the hardware initialization?

Thanks,
JumpStart

  • 0
    TI__Guru* 84110 points

    JS,

    If you are not comfortable with writing the code to duplicate the GEL initialization in the DPR memory, you could use the NOR AIS boot mode and supply the appropriate parameters using the AIS tables.

    For the NOR Legacy boot mode, you need to write the code to execute the initializations as described in the datasheet and User Guides/Reference Guides for initializing everything in the device, so be careful when copying from the GEL file and make sure you are following the recommended steps in the documentation. You can write this code in a variety of ways, but one way would be to write a small C program that runs entirely from Shared RAM (not L2RAM) and do the initialization in main() before doing additional copying.

    Regards,
    RandyP

  • 0 in reply to RandyP
    Intellectual 605 points

    Hello RandyP,

    My secondary bootloader is currently running from L2RAM as described in the wiki page (see earlier post).  I have added an initialization module that duplicates the initialization procedure in the GEL file.  This initialization is done as the first step entering into the main function of the bootloader.  From your suggestions, I am not clear as to why you are suggesting that it should be run from Shared RAM and not L2RAM.  Can you please shed some light on this?

    Thanks,
    JumpStart

  • 0 in reply to JumpStart
    TI__Guru* 84110 points

    JS,

    The Bootloader Application Report sprab41 says that the Legacy NOR Boot copies a certain amount of secondary bootloader from the EMIF CS2 space at 0x60000000 to the Shared RAM area starting at 0x80000000. If the documentation has the wrong addresses in it, please let us know.

    It sounds like you have it working, no matter how I read the Bootloader App Note. Well done.

    Regards,
    RandyP