I am using a C5509A as a I2C slave at address 0X57. Below is the code.
When my external master sends one byte (thats all I'm trying to recieve is one byte),
the 5509A slave does get the interrupt and recieves the one byte from the master, i.e. the I2CIsr interrupt does happen.
However when my master sends again i.e. send the address and byte the I2CIsr interrupt never happens again.
I can observe that I2C_EVT_RRDY bit is set in I2CIER after my master first write and on the first entry into the I2CIsr,
(from the first master write) RRDY in I2CSTR gets cleared.
After that RRDY in I2CSTR never gets set again on subequent writes from the master even though I2C_EVT_RRDY bit is set in I2CIER.
Can anyone please help hear? Am I missing something in the ISR or ?? on the setup??
Thanks
I2C_Setup Init = {
0, // 7 bit address mode
0x0057, // own address - don't care if master
192, // clkout value (Mhz)
400, // a number between 10 and 400
0, // number of bits/byte to be received or transmitted (8)
0, // DLB mode on
1 // FREE mode of operation off
};
void main()
{
CSL_init();
IRQ_setVecs((Uint32)(&VECSTART));
old_intm = IRQ_globalDisable();
// Initialize the I2C using the iniitalization structure values
I2C_reset();
I2C_setup(&Init);
eventId0 = I2C_getEventId();
IRQ_clear(eventId0);
IRQ_plug(eventId0,&I2CIsr);
I2C_eventEnable(I2C_EVT_RRDY);
IRQ_enable(eventId0);
IRQ_globalEnable();
rec = 0;
while(1)
{
if(rec)
{
datareceive[0] = I2C_RGET(I2CDRR);
printf (" interrupt %d \n", datareceive[0]);
rec = 0;
}
}
interrupt void I2CIsr(void)
{
rec = 1;
}