AM335x GPMC CS setting

g.f.

Hi,

I have a question about AM335x GPMC.

Because of pin mux, I'm thinking of GPMC_CONFIG7_i setup for
each Chip Select as follow:
=======================================================
CS0(256MB) : BASEADDRESS = 0x00, Mask Field = 0x0

CS1(128MB) : BASEADDRESS = 0x10, Mask Field = 0x8

CS2(not used) : BASEADDRESS = default, Mask Field = default, CSVALID = disable

CS3(64MB) : BASEADDRESS = 0x18, Mask Field = 0xC

CS4(not used) : BASEADDRESS = default, Mask Field = default, CSVALID = disable

CS5(64MB) : BASEADDRESS = 0x1C, Mask Field = 0xC

CS6(not used) : BASEADDRESS = default, Mask Field = default, CSVALID = disable
===========================================================

Is there any problem with my setting?
What I wan to know is do I need to use sequential CSn?

best regards,
g.f.

over 12 years ago

0 Biser Gatchev-XID over 12 years ago

TI__Guru**** 393215 points

Hi g.f.

The settings seem OK. I don't think the CS signals need to be sequential.

0 g.f. over 12 years ago in reply to Biser Gatchev-XID

Guru 15520 points

Hi Biser,

Thank you for the answer.

best regards,

g.f.

0 jags vg over 11 years ago in reply to g.f.

Intellectual 865 points

Hi g.f/biser,

I am also working on fpga connected to processor through gpmc bus.

we have used 4 chip-select (cs4,5,6,7) for fpga<---->processor.

i want to address 256 mb through 4 cs.

i understood how to configure mask field. but,

could you please explain how can i decide BASEADDRESS for each CS?

----------------------------------------------------------------------------------------------------------------------------

Thanks,

jvg

0 Biser Gatchev-XID over 11 years ago in reply to jags vg

TI__Guru**** 393215 points

Hi jvg,

Please check section 7.1.3.3.8.1 in the AM335X Technical Reference Manual, Rev. I.

0 jags vg over 11 years ago in reply to Biser Gatchev-XID

Intellectual 865 points

Hi Biser,

Thanks for your reply.

But in 1st que.

CS0(256MB) : BASEADDRESS = 0x00, Mask Field = 0x0

CS1(128MB) : BASEADDRESS = 0x10, Mask Field = 0x8

CS3(64MB) : BASEADDRESS = 0x18, Mask Field = 0xC

CS5(64MB) : BASEADDRESS = 0x1C, Mask Field = 0xC

How g.f have selected base address like that? i am going through the TRM ,i have understood how to set mask field, but still i am not able to understand how to set the base address.

and what is the offset for chip-select?

stucked ,

jvg

0 Biser Gatchev-XID over 11 years ago in reply to jags vg

TI__Guru**** 393215 points

Base address are GPMC addresses A[29:24]. See the memory map in section 2.1.

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AM335x GPMC CS setting