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Using External Interrupts with the TMS320C6713B Processor

Robert Bianchi
Prodigy 40 points

I am using a TMS320c6713 Processor with four external interrupts to implement four channels of DMA to four devices. I am using the Chip Support Library to setup these four channels. I am using a call to EDMA_configArgs() call with the upper 16-bits set to 0x411 + TCC number in the next four bits. I have setup the TCC Event to process the service and do the appropriate action when the Transfer Complete occurrs. Most of my questions are related to the hardware side. My questions are as follows: How wide a pulse is required by the TMS320c6713 CPU to recognize the service request? Is the service request edge or level sensitive? If its edge sensitive, which edge? I am using an FPGA to generate the Service Requests, my software sends a signal to the FPGA to "Enable the DMA Operation". The Tranfer Complete Service, turns this signal off. When the EDMA_configArgs() is called, the software then makes a call to EDMA_setChannel() to set the event to start the EDMA operation. Immediately, after that the "enable DMA signal is asserted to the FPGA. For example, if I have programmed the channel for two words, and I kicked-off the DMA, will the next transfer request result in the TCC being asserted or does it take two more? How Quickly is the TCC Serviced?

  • 0
    TI__Guru* 84110 points

    Robert,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages. Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics. You can find some good, maybe a little old, archived training for the C6713 by searching on the Wiki for "c6713 training" (no quotes) - I think it has c6x1x in the title.

    Robert Bianchi said:
    How wide a pulse is required by the TMS320c6713 CPU to recognize the service request? Is the service request edge or level sensitive? If its edge sensitive, which edge?

    Please take a look at the datasheet. You can search the pdf for "interrupt" (no quotes, or does it matter?) and look through to find your answers in better detail than I could tell you.

    Robert Bianchi said:
    I am using an FPGA to generate the Service Requests, my software sends a signal to the FPGA to "Enable the DMA Operation". The Tranfer Complete Service, turns this signal off. When the EDMA_configArgs() is called, the software then makes a call to EDMA_setChannel() to set the event to start the EDMA operation. Immediately, after that the "enable DMA signal is asserted to the FPGA.

    I am confused about signals and enables and the sequence of events here. If you understand it, I probably do not need to, at least not once you get it all working. Or is it working already?

    Robert Bianchi said:
    if I have programmed the channel for two words, and I kicked-off the DMA, will the next transfer request result in the TCC being asserted or does it take two more?

    It depends on how you programmed the EDMA to operate. The training material does cover the EDMA, I believe, and if not then the EDMA User's Guide is great read for understanding exactly how it works. It has been quite a while since I used the C6x1x EDMA, so I would just confuse us both if I tried to read it to you and put in my poor recollections.

    Robert Bianchi said:
    How Quickly is the TCC Serviced?

    From exactly what to exactly what are you asking about? There are a lot of events and peripherals and modules and software involved. In any case, the answer is probably not as easy to predict as it is to measure.

    I really think the training and the EDMA User's Guide will be your best tools at this point.

    Why are you using the C6713? For a new project, I would certainly recommend a newer processor like the C6748 - faster, lower cost, EDMA3, more features. Just a thought.

    Regards,
    RandyP