C6455 Target Configuration

Jeong Sang Gi,

We may need some more information and description of what you are doing. I will offer a few comments or questions.

Jeong Sang Gi said:

GEL files are required when you create a project, are not they?

GEL files are not required to build a DSP project, which includes the source files and header files and libraries that you will execute. GEL file can be used when loading the .out file onto the DSP, but GEL files are not required for that either. GEL files are only a convenient way to initialize the memory interface on your board and clock frequencies of your DSP device. Without the GEL files, this initialization must be done in your application code.

Jeong Sang Gi said:

And Assembly, Intrisic C, Natural C using FFT test results,
The resulting values ​​were the same.

 CPU cycle is shown below.

1 Assembly: 114 ms (114,779,050 cycle)
2 Intrisic C: 4105 ms (4,105,819,628 cycle)
3 Natural C: 6 ms (6,441,332 cycle)

GEL file without adding the results of tests,
The resulting values ​​were the same.

 CPU cycle is shown below.

1 Assembly: 556 ms
2 Intrisic C: 327 ms
3 Natural C: 498 ms

I wonder why these results have come.

This is very difficult to understand why the numbers have these values. Assembly should be the fastest and Natural C should be the slowest. Please explain more about the differences in these tests and how you are taking your measurements.

Regards,
RandyP

Has written a .cmd file as shown below.

.out file loaded into the DSP,
to check the source code of the algorithm for the computation time.
CPU cycle was measured by using the CCS's Run menu - Clock

You do not have to use the GEL file,
heap data mapping is performed in the DDR that is difficult to understand.

.out file loaded into the DSP using the emulator, and test, because
without using a GEL file,
heap data has been mapped to the DDR, it is difficult to understand.

PLL settings, memory initialization were not included in the source code.

CPU Cycle measurement results
Assembly, Intrisic C, Natural C was changed to run FFT function.
FFT code is shown below.

Then, using the Run - Clock cycle was measured.

Jeong Sang Gi,

To make sure the Run -> Clock display function is working correctly, please try another program to compare it with. Please go to the TI Wiki Pages and search for "dsp clock speed" (no quotes) to find a test I use to confirm the speed at which the DSP is running. This test application uses the TSCL/TSCH counter registers of the DSP core to measure time and clock cycles. Run it for 10 seconds as explained in the text and compare the Clock display on CCS with that TSCL/TSCH count.

I would recommend using the TSCL/TSCH method to confirm your clock cycle measurements. I do not know what the accuracy is for the Run -> Clock display, although it may be perfect or it may have issues. The TSCL/TSCH counters are used in the test application above, so it can be used as an example of how to use those values.

Jeong Sang Gi said:

PLL settings, memory initialization were not included in the source code.

These initializations must be done. If you do not use the GEL file, then you must do the initialization in your source code.

Please use the GEL file to make your development easier. That is why the GEL file exists.

Regards,
RandyP