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how to determine PER_L4_ICLK in DM3730 ?

Other Parts Discussed in Thread: DM3730

Hi,

I wanted to find the clock frequency of McBSP4_ICLK which is one of the clock sources for the SRG of McBSP4 peripheral (page-3111, DM3730 TRM). Technical reference manual datasheet of DM3730 states it comes from the L4_ICLK (page-3084)

"The McBSP4_ICLK runs at the L4 core interconnect clock speed. It is used to trigger access to the
McBSP4 L4 interface and McBSP4 configuration interface via the MPU/IVA2.2 shared bus. It can also
be an input clock for the McBSP sample-rate generator (clock divider), depending on the module
configuration (see Section 21.4.3). Its source is the PER_L4_ICLK signal."

I have a C program to access and possibly set most of the DM3730 registers and would like to know how the McBSP4_ICLK frequency is computed and if possible changed.

Regards

Noel