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UART3 on custom AM3874 board

Other Parts Discussed in Thread: AM3874

Hi,

I am trying to connect to modem device on custom AM3874 board using UART3 interface. The problem is the baud rate I set (using minicom or stty) is not the one which interface transmit with (actual baud rate I observe on transmit pin is ~4.32 times faster than set). As I see in file clock814x_data.c in Linux kernel code (2.6.37 TI8148 EVM kernel with small modification for custom board), the clock source for UART3-5 ports (ttyO3-ttyO5) is set in different way that clock source for ttyO0-ttyO2. Why is that? What can I have configured wrong if my ttyO0 (console) works fine?

Regards,

Greg

  • I have observed the same problem on my custom board. uart-0 works fine as my console at 115200 8n1. But when I try to communicate with a peripheral over uart-3 I need to specify the baud rate (in picocom) as 2400 instead of the actual 9600.  As you observed, it's off by a factor of about 4x. I have been unable to figure out why. 

  • I was able to fix this, although I would say it is just workaround. The problem is that UART0-2 use sysclk10, while UART3-5 sysclk8. I am not sure why they differ 4 times (was not able to trace it yet in kernel code), but they are. The easiest way to make a fix for me was modify arch/arm/mach-omap2/serial.c:

        if(bdata->id < 3)
            omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
        else
            omap_up.uartclk = OMAP24XX_BASE_BAUD * 16 * 4;
    instead of

        omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;

    in line 787. It works fine now, but I am aware this is kind of hack and I am not sure why these clocks differ. Does anyone tried to use UART3+ on EVM? Is baud rate OK?

  • for the history:

    There are multiple possible CLK sources for the UART3/4/5. The CLK multiplexer shown in section 2.3.4 page 414 of the "AM387x TRM - SPRUGZ7E" enables to choose the same CLK source for UART0/1/2 and UART 3/4/5. The McBSP_UART_CLKSRC register (see section 2.10.1.143 page 631) can be used to change the CLK source from SYSCLK8 (default) to SYSCLK10 (same CLK src as UART0/1/2):

    a)  One way to change the CLK mux at the Linux level is given in the below wiki from Dave (that provides an AM387x/DM814x based module):

    http://wiki.dave.eu/index.php/Configuring_UART3-4-5_%28Naon%29

    b) An other way would be to change the McBSP_UART_CLKSRC settings in U-boot at the end of the PLL init. See the u-boot-omap3.git/board/ti/ti8148/evm.c.

    A.